to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A. W. Sloman
subject: Progress to 6th January 1989
Our list of possible sub-contractors for assembling our surface mount boards is now reduced to three – Newmarket Microsystems are not prepared to quote, because the boards are considerably bigger and more complex than they are used to.
We have heard nothing from Surtech or BAC Dynamics, and nothing more from British Telecom. I called up Surtech and BAC Dynamics today; Surtech had confused our enquiry with one from Richard Povey, but a Mr. Paul Davidson will be coming in at 11:30 am next Tuesday. I wasn’t able to get hold of Roy Jackson at BAC Dynamics.
Mike Rolfe and I figure that we should send an expedition down to BT at Martlesham Heath as soon as possible, to make sure that they are for real.
Phil Fick is unenthusiastic about us sub-contracting the printed circuit layout work to BT – because everybody is behind on delivering their circuit designs to PCA, the expected over-load has not materialized, and Phil needs Yohannes’ board for the end of next week to keep his crew fully occupied.
Yohannes is reasonably confident that his Delay board will be fit to go for layout by the 16th – the design is ostensibly complete but it needs the extra week of testing and polishing.
Bob Ward’s Trigger board is making reasonable progress; the business of negotiating the timing signals for the Waveform Processor board with Bob Anderson of TDS is slowing things down a bit, and the estimated completion for the whole board has slipped to week 45, which would imply that the PCA wouldn’t be able to start before the 10th February.
Bob Anderson came in this morning with detailed circuit diagrams for substantial chunks of the digital accumulation circuitry for the Waveform Processor board; these showed up a few more gaps in the waveform Processor specification, but the design of this part of the board is making visible progress at last. This will stop in a fortnight’s time- Bob Anderson is off to New Zealand for a month’s holiday then – which may be nice for him, but comes as a nasty surprise to me.
Dave Cox will be coming over early next week to present his design for the analogue part of the board, which is claimed to be in good shape, albeit mostly on scraps of paper.
Dave Ward is reputed to believe that he has spent most of his second chunk of money and should now be giving us a fixed price to complete the work.
Yesterday I talked to Mr. Duesbury of Syscon about the Waveform Interface board, largely edited out of the Waveform Processor specification. It seemed to be enough to get him going. He also has two of our Taxichip receivers and two Taxichip transmitters in case he wants to breadboard something.
Kevin Jackson’s layout for the 200psec driver is now in PCA, being reproduced on the Applicon. Phil Fick insisted that we put it through the Circuit Design group before he would look at it, then started talking about taking three to four weeks to get it made – when we suggested that Kevin might hand-tape the layout and have the circuit etched onto a sample of microwave substrate that Kevin happened to have with him, Phil was not disposed to cooperate. We now expect the board in about two weeks.
Shaun has now loaded both the prototype Fast Head Amplifier boards, and we are now waiting for a box to put them in before we try them on the column.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 13th January 1989
The hunt for sub-contractors to assemble our surface mount boards has widened. In addition to last week’s crew, we have now sought quotes from Circatech, Corby Electronics and Avantel (a PA Technology spin-off in Royston).
Phil Fick, Kevan Purton, Mike Rolfe, Kevin Jackson and I went down to BT today to see their set up. On the assembly side they have no more equipment than is required to make surface mount assemblies for their research labs - it isn’t much, and they are not set up to get much throughput out of it. A more professional set up would inspire more confidence.
On the CAD layout side they had good equipment, and lots of it, and. enough draughtsmen to keep the equipment busy. Unfortunately they didn’t seem to have much experience of very high speed logic - it seems that that group at Martlesham Heath do their own layouts - so the CAD people are not in a position to sell what we want to buy.
Surtech came on Tuesday as expected, and promised us a quote for early next week. They had a portfolio of work done which included big boards for the Airbus, and fast boards for the Gould sampling oscilloscope. Kevin Jackson knows them of old, and thinks that they are pretty good (and will be proportionately expensive).
Corby Electronics came on Wednesday - they may be too small. We have yet to see Circatech or Avantel.
On our various boards, Bob Ward has now sorted out the block on the Trigger board which generates the Encode Edges to drive the sampling A/D converter on the TTLD output. There are another couple of blocks to go, but we are getting through it.
Yohannes isn’t quite going to have the Delay board circuit diagrams ready for Monday; he has sorted out the logical bugs, but may have a timing bug or two left. Phil Fick will have to set Kevan going on the de-bugged. parts of the circuit.
Yohannes seems to have come up with all the modes of operation that I asked for - including Brust mode - which is amazing and. praise-worthy.
TDS and Bob Anderson have been quiet all week - I don’t dare disturb Bob. It is hoped that what he leaves undone, Dave Ward of TDS will be able to finish off by the end of January.
My specification for the Waveform Interface board is now about three-quarters baked. Another spot of undisturbed over-time might get it into a state where it was worth reading - although still incomplete.
Kevin and Kevan have got the layout for Kevin’s Blanking Amplifier off to Printech for manufacture - it won’t be back until the end of next week.
Kevin has loaded and set up a Cambridge Instruments 0.5nsec Blanking board, and bodged it into a shape suitable to drive the new Blanking Amplifier - it should produce 200psec, 500psec, lnsec, 2nsec, 5nsec, 20nsec and up Blanking Pulses. We are hoping that no-one desperately wants a l0nsec pulse width.
This leaves Kevin at a bit of a loose end next week, the more so because Julian hasn’t yet been able to get round to telling us what our 50psec blanking plates will look like. We are getting Kevin a University Library reader’s ticket so that he can at least do some background reading.
I’ve ordered 10-off of 125MHz Taxichip transmitters and receivers (10 of each). This may make life easier for the Waveform Interface.
My attempts to order our Analog Devices parts, and our 100k ECL in flat-packs, are still progressing. Analog Devices have yet to call me back, and the l00K ECL is not widely stocked. in flat-packs, though the dual-in-line packages are available everywhere.
(Noted added 30-07-2017: The “TTLD” output was the output of the Through The Lens Detector, which shifted the secondary electrons knocked of the surface of the device under test up through the magnetic field generated by the final lens of the electron microscope column - getting rid of any side effects from local fields on the surface of the device under test - put them through an energy-selecting filter grid before turning them into flashes of light coming out of a scintillator which were then detected by the photomultiplier attached to my Fast Head Amplifier Board and turned into a rapidly changing voltage level which got digitised and fed into the signal processing hardware)
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 20th January 1989
The hunt for surface mount contractors has pretty much run its course; we now have estimates from Corby Circuits, Surtech and Avantel to compare with BT’s.
Corby’s estimates for assembly are much cheaper - at about 100 pounds - than anybody else. Surtech want 180 pounds for prototypes and 150 pounds in production, where BT want 499 pounds for prototypes (one week) and 278 for production (three weeks) and Avantel estimate 300 pounds but offer a 3-day turnaround.
Surtech offers the lowest layout estimate, at 4,000 pounds. Corby offer to do the job for 5,400 pounds, BT estimate 4,000 -5,000 quid, and Avantel want 7,000 pounds. Avantel appear to have figured in a lot of overtime and would expect to complete the layout in 2/3 weeks, about a week faster than anybody else.
Since we are even more desperate for time than for money, Avantel seem to be the preferred candidate for building the prototype boards, and laying out any board that PCA can’t handle - we will try and get down to look them over on Monday if at all possible. For production, Corby Circuits is particularly attractive.
Our first surface-mount board, for Kevin’s Blanking Driver, arrived rather earlier than expected - it was finished on Tuesday night, and Kevan picked it up on his way to work on Wednesday morning.
Kevin had it loaded and powered up by the evening and working by midday Thursday. It is much more stable than the original layout, but not - as yet - any faster. Kevin is working his way back into the Blanking Board, trying to get the l00K ECL inputs to the Blanking Driver to deliver the 700psec transition times that the data sheets, Tim Frost, and. my write-up all promise.
Once this is achieved, the next step is to start cutting down the damping resistors on the Blanking Driver; Kevin expects that we will get down to a 200psec pulse before we run out of stability.
Yohannes has now cured his timing bug - we had to go up from a cheap GaAs Picologic (£76.45 for a dual D-flip-flop) to the standard part (£89.94), and I’ve actually ordered three of the fast parts (£107.93) to buy a bit more margin against imperfect layout.
The Delay board is again almost ready to be released to PCA - we have to allocate the input and output connections. Just now Yohannes is engaged in the unglamorous task of putting in all the terminating and pull-down resistors (about 500) and spreading his circuit diagram over four sheets instead of three to make room for them.
Peter Milne is starting to get his mind around the business of programming the Delay boards - Yohannes is going to have to give him a tutorial on the various control bits within the Sampling List and the control commands which are going to have to be sent across the VME bus.
The Waveform Processor board is progressing; Bob Anderson flew off to New Zealand this evening, but when Bob Ward and I went over to TDS yesterday afternoon Dave Ward and Dave Cox seemed to have got their minds around the design. We have some hope of seeing a completed design by mid-February, albeit without benefit of simulation.
As TDS get to grips with all the requirements of the specification, the Trigger board specification changes and grows - by the end of the meeting Bob found that his Sampling Pulse Generator was going to have to change, the specification for the Latch Pulse generator was somewhat different, and he was stuck with generating a new signal, tentatively entitled the Squelch Pulse.
The changes are going to cost Bob about one day’s redrawing effort - the Sampling Pulse Generator will end up slightly simpler, but any change to a completed block is drawing time. The Latch Pulse generator is still at the pencil sketch stage, so the additional complication added there is less of a problem.
Peter Milne is going to have a lot of fun getting his mind around the stuff he is going to have to write into those two boards to get them to work. This should be a blessed relief after the Vacuum Control board.
Simon Dawes seems to be enjoying himself in his own mental gymnasium - the Cursor Board. Large chunks of it are drawn - it has picked up a few interesting components from the S.360. Peter Milne will, of course, have to get his mind around this board as well, but to make this easier for Peter, Simon is letting Peter design the PALs that control the sequencing and addressing...
My Interface Board specification has now evolved into something that seems reasonably coherent to me - it looks as if I’ll have to test this opinion on Syscom next week. Since I am going to have to spend the next few days up-dating the Trigger and Waveform specifications, the Interface Specification is probably as coherent as it is going to get for some time.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 27th January 1989
The hunt for surface mount subcontractors is now pretty much over. Mike Rolfe, Phil Fick, Kevan Purton, Kevin Jackson and I all went off to Avantel last Tuesday morning. We talked to Mike Furlow and Frank Ferdinandi of Avantel, and Gary Askew of GSP who would be doing our printed circuit layouts as a subcontractor to Avantel.
Avantel was neat and clean and quite as impressive as a P.A. Technology spin-off might be expected to be; they didn’t have much gear, or many people, and most of their work was on small boards, but they seemed to have all that they would need to handle our work.
Gary Askew of GSP claimed to have two draughtsmen with 100k ECL experience, - one them had also worked with GaAs Picologic for Philips. Both of them are apparently willing to work long hours for the right money.
A Mr. Littlewood from Printech visited us on Wednesday morning; he expects to be able to offer us a pair of experience SMT assembly technicians from the beginning of March, once his new surface-mount assembly service gets under way. This may be helpful if we get stuck.
Mike Rolfe and I visited Surtech at Basingstoke on Friday; they had little more equipment than Avantel - depending how you rate a pair of Dynapert 318 pick and place machines - but lots more work in progress and many more people doing it. The equipment looked very much more used than Avantel’s.
We bought a copy of the Surtech design rules for 50 quid; Kevan and Rodger are not impressed - the Surtech rules are old, infested with errors and at several points represent a one against three minority opinion against the Siemens rules we had from Printech and. the Plessey and Marconi rules as remembered by Kevan and. Rodger respectively.
Surtech are willing to offer 3-day turnaround at 250 quid per board, provided that components and artwork are available 10 to 14 days in advance of the boards to be loaded, Against this,
Surtech are moving to larger premises a block down the road over Easter, which is when we ought to be having our boards loaded.
Back in the real world, Yohannes has passed his Delay board design over to PCA, where Rodger Snook is getting on with it; Phil Fick expressed his usual anxieties about design rules and ATE test pads, but we promised to put 1mm diameter probe pads on every output where the high frequency layout restrictions allow, and this seemed to be enough to get things going.
Dave Hall wants a cost for the Delay board, and Rodger Snook wants the power pinouts. These requests have been queued.
Yohannes is now working on the VME part of the Waveform Interface board; he is off on holiday next week, which is unhelpful.
Bob Ward is still working through the Trigger Board; last week wasn’t too productive, since he was off sick for a day which meant that reworking the system for generating the processing pulses took rather longer than expected. The estimated time of arrival for the board design is still Monday, 13th February. The Trigger board specification is now almost up to date.
TDS passed over a design for the analog part of the Waveform Processor on Thursday evening. We should be able to pass it on to PCA before the end of next week - there are a couple of drop-offs in the specification which I can fix on the circuit faster than I could get TDS to sort them.
The digital part of the Waveform Processor is now firmly in Dave Ward's hands; he wants an up-to-date version of the Waveform Processor specification which I plan to give him as soon as I can. Dave Ward is not wildly optimistic about completing his design by the 18th February - It isn’t impossible, but out of date and contradictory specifications are not helpful.
I attended Dave Hall’s progress meeting with Syscon on Wednesday evening; they seemed to be making good progress. Peter Milne got stuck with writing a revised software specification - he too should have attended the meeting...
Kevin Jackson has given up on trying to improve the CI Blanking board by improving the layout, and has added a GaAs line receiver/driver to speed up the 100k ECL outputs from the logic to the level shifters. This speeds up the 700psec ECL edges to 200psec but the improvement at the Blanking Driver output is less marked.
Kevin has been continuing to struggle with the Blanking Pulse generator. The 500psec pulse is now much nicer looking, but it is still well short of 200psec. The next stage is to make a new Blanking Driver board incorporating the GaAs driver; Kevin Jackson has been discussinq this with Kevan Purton this afternoon and I expect the new board sometime next week; probably after Smartex and the Gigabit Logic seminar in London.
Trevor Sexton and I talked to Gerry Prusiewicz about the S.300 Image Processor. It will be gorgeous, but it will use up three slots in the VME crate, which we haven’t got unless we get Syscon to put the 8-plane Memory Boards into surface mount and. kill off the daughter boards...
I haven’t seen much of Simon this week - when I last spoke to him he was roasting the Field Emission Gun. I keep wondering if that was a hallucination.
Peter Milne has been similarly evanescent - he has been mousing around in my computer files, and left me with a runoff file that I couldn’t delete, which was initially confusing, but the file has now vanished away.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 3rd February 1989
I suspect that we have made a fair amount of progress this week, but I’ve worked more than my usual amount of overtime, and I am not sure that the company has had value for money.
My biggest lump of work has been getting the Waveform Processor specification expanded out and adjusted to fit and direct the work at TDS.
I was over at TDS on Wednesday morning and again this morning discussing and explaining the specification in all its rococo glory.
As is usual in such cases this has clarified my own thoughts wonderfully although I am not sure that the specification is much easier to read. Trevor Sexton has a copy and I get his opinion on Monday.
Dave Cox at TDS now seems to be fairly happy with his design for the Taxichip interface; he is now trying to get the control logic into a 16V8 PAL (he rejected the 22Vl0 as extravagant).
Dave Ward is still getting into Bob Anderson’s design for the digital processing section, and trying to comprehend the way it works in its various modes of operation (six, so far). The specification grew ten extra pages to spell this out.
Dave Ward expects to get a solid chunk of work done on this over the weekend, at which point I hope he will be in a position to see whether Bob Ward’s Processing Pulse Generator design is producing Encode, Memory, Write, Latch and Squelch pulses at the right times and in the right number to drive their processing.
I’m scheduled to go over to TDS again on Tuesday morning.
Yohannes was not on holiday this week, but on the ESSC ASIC course. For us, the difference is academic.
Bob Ward has been working furiously on the Trigger Board, and has completed the design of the Processing Pulse Generator, which now leaves him only the Taxichip/VME Interface to finish off. He is quietly confident that he will finish the design for Monday the 13th February, provided that I don’t mess him about by changing his specification,
I have a paranoid suspicion that this is partly a ploy on Bob’s part to get Dave to beat the hell out of me when I do have to change the specification...
I am in the processing of changing the Waveform Interface specification, after the discussions with Dave Cox, to make the Waveform Processor/Image Store connection somewhat simpler. I hope Paul Duesbury sees it this way when I tell him about it next week.
Rodger Snook is now getting into Yohannes’s Delay board. Kevin Jackson has been keeping an eye on the detailed layout (although I was foolhardy enough to over-rule him on one point which I desperately hope turns out to be minor).
Les Mulliner came in on Monday to set us straight about test fixtures for the boards; we can get away with 0.75mm diameter test pads separated by only 1.27mm where we have to. Both concessions decrease the robustness and reliablity of the probe assemblies, but it won’t make much difference on our volume of boards.
Analog Device have messed us all about by failing to release the AD9712 very fast 12-bit DAC as expected - the first production batch had a 0.1% yield. On the Delay board I’ve replaced it with the AD9768 (Rodger has a marked-up print) which is only 8-bit, but even faster. On the Waveform Processor board I’ll use the Burr-Brown DAC63, which is slower but acceptable (now that we have given up 50MHz sampling for the moment).
I still haven’t gotten round to up-dating the Waveform Processor Analog board circuit diagrams to include this, or most of the stuff I had to do last week. This is getting urgent (join the queue, with the board costings for Dave Hall).
Gigabit Logic have messed us about a whole lot more by failing to produce the 16G060 time delay generator. Their first production batch (and. that came as a nasty surprise - I had thought that it was newish, but in production) worked, but not very well.
Apparently the timing ramp doesn’t look like a straight line - it starts as a smooth curve, continues as a rather rounded stair-case, and finishes with an exponential tail. Depressing. We might get a sample or two, but they ain’t going to sell any.
We should be able to fake up a replacement with a 10G002 and a current source which will sort out the Delay board and. the Unblank Pulse Width control on Bob Wards Trigger board.
Granting our degradation to 40nsec interpulse delay, Bob could replace the other three 16G060s on his board with two AD9500 time delay generator chips. I suspect that this may count as a change in specification, and I ought to keep my cycling helmet on all the time I’m at work.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W. Sloman
subject: Progress to 10th February 1989
There seems to have been some progress this week TDS now seem to be on top of the digital part of the Waveform Processor, (even though it now includes provision for Brust/Micawber mode operation) and should have everything done bar the PAL programs by the 18th. Whether it will all be on Metheus is another question, but we are planning to set GS Designs going on the layout from about the 20th, even if they have to work from pencil sketches for the first week or so.
Once Dave Ward at TDS had gotten a clear understanding of the Waveform Processor accumulator operation, it became clear that we had to change the specification for the Latch and Squelch pulses coming from the Trigger Board.
Bob Ward has pretty much finished adding the Taxichip interface to his board, but dealing with this change to his specification, as well as sorting out the replacements for the 16G060 time delay generator, will push back the completion of the design -we hope it will be finished by the end. of next week.
Rodger Snook seems to be making good. progress on the Delay Board layout and hopes to have it finished before the end of the month.
Yohannes has had to correct a few minor drop-offs on the circuit diagram (Dave and I forced Yohannes to pass it over to Rodger somewhat earlier than Yohannes would have liked), and I’ve put in the AD-9768 to replace the AD-9712 we can’t get. We still have to make up our minds what we are going to do about replacing the 16G060 time delay generator, but Rodger is leaving as much space as he can around the device ...
Bob Ward and I went to a Gigabit Logic seminar on Wednesday, and we got to ask Carl Deierling of Gigabit about the 45 degree versus 90 degree bends - he thought that 45 degree bends were fine, although ideally one should also trim the angle off them too.
I’ve modified TDS’s Metheus circuit diagrams for the Analog part of the Waveform Processor board, and ATE and PCA both have copies of the modified circuit diagrams; PCA want parts lists and will want connector information. The layout ought to get underway next week. This card will be laid out for FR4 epoxy resin board.
I talked to Paul Duesbury of Syscon about the Waveform Interface board on Tuesday. He seems happy enough with the revised specification, as a basis on which he can design a better system.
Kevin and Kevan have thrashed out the improved and extended Blanking Driver board layout; we should have a couple of boards back next Tuesday evening, for Kevin to load and test on Wednesday, before he goes off to Tunisia on Thursday for a fortnight’s break. My wife thinks that this is an example that others might follow.
Peter Milne and Yohannes have had at least one interesting conversion about Sampling Lists - Peter wants to be able to get the Delay boards to do simple sampling, while Yohannes is more conscious of the features required to handle the exotic variations, but both seemed to be happy after their encounter.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 17th February 1989
Avantel now have a purchase order number for the layouts for the digital part of the Waveform Processor and for the Trigger Board; I had hoped to bring in Gary Askew this week, to let him get an impression of the boards his draughtsmen are to lay out, and to find out how he wants the circuit information organised, but I got distracted, and it will now happen early next week.
I spent most of last Monday at TDS, being walked through the digital accumulator part of the Waveform Processor board by Dave Ward; it was interesting, wearing, and productive - we found a couple of minor drop-offs. Dave Cox found a few missing control bits for the Taxichip interface. I’m going back this Monday - by then most of the circuit design should be on their Metheus, and Dave Ward will be finalising the PALs.
Bob Ward has pretty much done the last of the modifications to his Metheus diagrams for the Trigger board - he and I spent about an hour or so last night working out a circuit to replace the 16G060 controlling the Unblank Pulse width in the 2.5 to 20nsec range. Basically, I elaborated his original scheme to get us equal propagations delays in the logic paths from the Sampling Edge to the leading edge and to the trailing edge of the Unblank Pulse, doubling the number of components in the process. I am quite convinced that it is worth it ...
Rodger Snook has laid out quite a large chunk of the Delay Board. Yohannes took me through the layout today, and it looks good; of course Yohannes has now redrawn a chunk of his circuit diagrams to accommodate his substitute for the 16G060 (designing that took up much of Tuesday). Rodger will have to rip up part of his layout to accommodate the new components.
Yohannes hasn’t quite finished the VME-only Waveform Interface design yet, but it is close - he has expressed a willingness to put in a couple of hours over the weekend, even though he only gets the same flat rate at weekends as during the week. My wife gets very restive about me working weekends for anyone else, even at time-and-a-half, and. I fear that Yohannes’ wife may bring him to his senses.
Kevin lit out for Tunisia on Friday, rather than Thursday as erroneously predicted last week, which is as well - the new Blanking Driver board arrived fairly late on Wednesday, and Kevin didn’t get it loaded and working until fairly late on Thursday.
It is fast but the 10G012 driver is not producing entirely complementary pulses - the old parts Kevin is using are equivalent to the modern 10G013 drivers which allow you to program for narrower pulse out of one side than the other. We may have to sacrifice one of our modern 10G012 drivers, which don’t have this feature.
Today Kevin’s mate Percy from Marconi at Portsmouth rang though with a reference for a paper on bending microstrip transmission lines - I got a copy from the SPL this afternoon and it looks useful - I’ll try and precis the relevant bits at the end of this report.
Today I had two short talks with Paul Duesbury about the full Waveform Interface board which he is designing - the first because Dave Hall has worked out how to make the system do Logic State Mapping, and wanted me to confirm that the Waveform Interface could be programmmed to interrupt the processor at the end of every scan line, and wait while a new Sampling List is down-loaded.
Paul didn’t see any difficulty in providing this facility.
The second conversation followed a discussion with Dave Cox of TDS, who had made it not only possible, but also obligatory, for Paul to send the Waveform Processor the Expected Waveform for a new pixel at the same time as the Waveform Processor sent back the Improved Waveform from the preceding pixel. Paul saw this as an inelegant inflexibility, but admitted that his design would be able to cope with it - I made distressed noises about the imminence of the 22nd of May.
Last week I was over-optimistic about my modifications to the TDS circuit diagrams for the Analog part of the Wavefrom Processor - I spent about another day’s worth of time at the Metheus terminal getting the diagrams into better shape and I still haven’t got the parts list done. PCA have got connector information and mechanical layout data for all the parts, but I think I am going to have to make minor changes to the power supply pinning.
Kevan Purton has now actually got underway on the layout, making up cells and doing placements, so I can’t complain about that any longer.
Microstrip Discontinuity Capacitances and Inductances
A paper of this title was written by Peter Anders and Fritz Arndt and published in the IE~ Transactions on Microwave Theory and Techniques MTT-28 (11) pages 1213-17 (November 1980). I’ve got a copy.
Amongst other things it discusses 45 and 90 degree junctions in microstrips. My reading of the conclusions is that
1. The problem is worst for 50R microstrip; the reflection from a junction will be roughly a factor of three less from the same junction in 75R track and another factor of three down again for l00R track.
2. The reflection from a 45 degree junction is about a third of that from a 90 degree junction, so there is a small advantage in making a 90 degree change in direction as two 45 degree junctions.
3. The discontinuity can be reduced by about an order of magnitude by bevelling (they use the term mitering) the outside edge of the junction. For 90 degree junctions, thescale of the trim decreases with decreasing impedance, while for 45 degree junctions there in a smooth maximum in the trim around 75R.
Gigabit Logic’s Application note 2 at Fig. 5, gives a figure of 1.8 times the track width as the optimum length for the trimming cut for 90 degree junctions.
Applying the Anders and Arndt results, I get closer to 1.55 for a 50R track on PTFE, 1.77 for a 75R track, and about 2.2 for a l00R track, all for 90 degree junctions.
For 45 degree junctions in 50R track the equivalent figure is 0.91 of the width of the track. For 75R track this increases to 1.5 of the track width, and for l00R track it goes down a bit to
1.46 track widths..
Note that while our CAD system puts a radius on the outside corner of all track corners, the area trimmed off by this feature is at least an order of magnitude less than that removed by any of the trimming cuts specified above.
It is also worth noting that a via or a test pad inserted into a “constant impedance” microstrip will introduce much larger reflections than an untrimmed 90 degree junction.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 24th February 1989
There has been a certain amount of progress this week, which I noticed once I got enough antibiotics into my system that I could pay attention to something other than my tooth.
The Digital part of the Waveform Processor board is now in the hands of GS Designs; the layout isn’t exactly underway, but they are getting started. We should have a good estimate of time and cost early next week.
The handover started on Monday, when I went over to TDS in the afternoon, and met Gary Askew and the draughtsman who will be doing most of the work. We discussed drawings, and netlists, and parts lists, and the mechanics of transferring files from the TDS Metheus to the Racal Cad-Star that GSD use.
It seems likely that we will have to translate half-inch tapes from TDS into five and a quarter inch disks for GSD - apparently there is a route from our Metheus to our Unicad, or so John Gibbons assures me.
We all went back to TDS on Wednesday, accompanied by David Cairns, who gave Dave Ward what sounded like a useful tutorial in PAL programming before the main discussion got underway.
Incidentally, it looks as if Dave Ward and Dave Cox will write logic equations for their PALs which we will convert to HiLo models on our Metheus and ship back to run within their simulation (which Dave Ward will be running over the next week or so, at vast cost to us).
After the tutorial, Dave Ward. handed over six drawings representing the Digital part of the Waveform Processor - one set to me, and one set to Dave Askew. One drawing has space for six PALs and essentially little other information, another was being replotted to accommodate a last minute change to the “Squelch’ pulse, but there was enough there for GSD to take them away and construct a parts list and a net list.
Dave Cox will spend next week constructing his own parts list, net list, and high level drawing (again at vast cost to us) hut. these will be too late to be of use other than for checking.
GS Designs will be coming here on Monday to bear off Bob Ward’s Trigger Board design - we expect that to have a net list and a parts list by then. Bob got me to do some checking this week, and there was very little wrong that I could find. There are minor things I would like to alter - around. the External Clock input divider, and the Squelch pulse generator - but they will be very hard for the users to notice.
I did manage to waste some of Bob’s time and Rodger Snooks’ time, by having afterthoughts about the signal distribution across the back-plane; this now seems to have settled down, and is written into the Trigger and Waveform Processor specifications, along with quite a lot of layout information.
The backplane connections still have to be written into the Delay board spec - this isn’t too urgent, since Rodger has fixed it rather more firmly by building it into his layout.
Kevan also suffered from my indecision - several hours of work on the Analog part of the Waveform Processor got torn up when I made my intentions clearer. Mike Rolfe also got into the act, but agreed to let us put the DACs and ADC on the board so oriented that all the digital pins were to the front of the board, even though this meant that several of them pointed in opposite directions.
There is also a possible conflict between layout and air-flow on the High Voltage amplifier and DAC combination. It may be more difficult to negotiate an acceptable solution this problem.
I’m still trying to get a parts list together for the Analog part of the Waveform Processor - it is now up to item 5, covering 69 components.
There has been no contact from Syscon this week.
Peter Milne is getting a haunted. look as he now begins to realise how the hardware relies on the software for the simplest services (which don’t. have to be done fast).
Simon has now got into the heroic part of the Cursor Board design - he has completed. the circuit design, and he is now writing down the specification against which he designed the board, so that the Circuit Design Group can pass the whole package along to PCA.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 3rd. March 1989
There has been some more progress this week.
TDS have now described the digital part of the Waveform Processor in sufficient detail for Bob Moore of GS Designs to begin layout. He expects to have the components placed by the end of the weekend, and the layout completed. about two weeks after that. I’ve had a parts list from him, checked the ECL parts against my stocks and bought in some of the more exotic TTL/CMOS parts in surface mount packs.
Dave Cox at TDS has completed a top level diagram on paper for GS Designs, and is now entering it into the Metheus - we will get a complete package early next week on l/2inch tape, which we can then plot and give to ATE.
Dave Ward is still working out his PAL programs; we hope to get them early next week so that we can convert them into a form which can be used for simulation. The layout is likely to be completed before the simulation.
GS Designs arrived on Monday for Bob Ward’s circuit designs for the Trigger board, sorted out the information they wanted and the form they wanted it in, and took away enough information to get us an estimate.
On Wednesday Gary Askew came back and was presented with drawings, parts lists, component outlines, layout notes and anything else Bob could find to load him up with. He spent about two hours going through this lot, and asking for more (mostly for stuff that was already in the pile) before he retreated to Knebworth. Their estimated completion time (including photoplots) is the 31st March with. some hope of a few days improvement.
Kevan Purton has now completed his layout of the Analog part of the Wavetorm Processor, despite a fairly enthusiastic attempt on my part to slow him down, by re-jigging the video input circuits.
Kevin Judd is going to check it against the circuit diagrams when I can extract a set from the uncooperative Metheus system, and he will generate check plots so that I can check the more critical bits of analog layout against my well matured prejudices.
When Kevan gets back from moving house, next Thursday, we should have something to keep him occupied.
Rodger Snook is very close to completing his layout for the Delay board - Phil figures he has another week’s work in checking and. tidying up, and I have had a look at the (rather small) analog parts of the circuit, and vented a few prejudices - most of the analog layout is nice, hut there are spots that should be improved.
The parts list for the Analog part of the Waveform Processor is no further forward - what I progress I made earlier in the week was washed out in my re-jigging exercise.
Syscon rang up yesterday to inform us that the Waveform Interface board won’t fit on an extended double Eurocard. Fortunately it seems that it will divide quite naturally into two boards, with a little help from Yohannes.
Peter Milne is feeling less worried driving the Signal Processing crate; he isn’t any happier about the job, but an S.360 problem has risen up out of the past to distract him.
Simon’s heroic efforts on the Cursor Board have paid off - the circuit design group have accepted it and passed it. on to ATE, and. it will go into PCA very soon, one way or another…
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 10th March 1989
Most of my week has been devoted to assisting in the process of laying out the Delay board and the two Waveform Processor boards.
The Trigger board is in a quiet phase - probably the eye of the hurricane. Bob Ward. has now written his PAL programs, and programmed a set of PALs which will stay in his desk until we get a loaded hoard back from Surtech and can put them into the appropriate sockets (they will be the only devices on the board to be in sockets).
The “Waveform Processor - Digital’ circuit. diagrams were delivered from TDS by Dave Cox at 4.00pm Monday afternoon. It took until Wednesday morning to get even Versatec plots of all nine sheets for ATE.
Colin Gupta of ATE, Gary Askew of CS Designs, Dave Cox of TDS and I all got together on Wednesday afternoon to discuss board testing. Gary and Dave kept on talking afterwards about the missing outputs from the “Waveform Processor - Digital” hoard. Most of them are now sorted out, but the “Stop” pulses for the Delay boards are still hanging fire.
Dave Ward still hasn’t completed his PAL-programming, though he thought that he was most of the way there when I phoned him today.
On Thursday morning, ATE asked for a second set of copies of the circuit diagrams. I persuaded John Gibbons to put copies of the relevant Metheus files where I could get at them, added drawing frames to those diagrams that lacked them, put in part numbers and page numbers, added four of the missing outputs, and printed out two copies of each of the nine sheets. Even with the Versatec printer, this took a long time, and I got the last of the drawings out midday today.
Just in time to mark up one of the sets of prints with the test pads and extra resistors required by ATE, which I then drove down to Knebworth. Bob Moore hadn’t been held up waiting for the drawings, since he had been down with flu, hut he was expected to have recovered enough to resume work tomorrow.
I have been through Bob Moore’s parts list for the digital part of the Waveform Processor board, and worked out the cost for the integrated circuits (about 1300 pounds) and the power consumption for the ECL (about 17A). I am now aware that the parts list is short several 100114 line receivers, which implies that some other low level parts are also under-represented.
The analog part of the Waveform Processor has had. less attention. I have spent several, hours on the Metheus this week putting reference numbers on the circuit diagrams for this board to match Kevan’s layout, and putting terminators on unused inputs - which proved unexpectedly useful, since it revealed that all the six CLC-400 amplifiers on the board were missing a decoupling capacitor on pin 1. Yohannes caught this on the Delay board, but Dave Cox missed it on the “Waveform Processor - Analog”.
When Kevan came back yesterday he was less than amused, hut most of the changes have now been sorted out.
The parts list for the Waveform Processor - Analog board is no further forward than last week.
For the Delay board, I didn’t get around to completing my examination of the analog bits until this evening; there wasn’t much that needed changing, but I did ask for a few more ground connections on the AD-9002 (here, Dave Cox did better than Yohannes, by slavishly copying the Analog devices circuit diagram) and a couple of extra resistors. Rodger was to work Saturday morning, which should complete the board, for final checking and photo-plotting early next week.
Since the cyanate-resin-bonded PTFE cloth for the PCB won’t get to Printech before next Friday it would seem that we have the timing about right.
We have a. Metheus-generated parts list for the Delay board. This doesn’t include the extra resistors and capacitors that I have put in, nor Cambridge Instruments part numbers, so that is going to need. work.
Syscon have given us layouts for the 8-Plane Memory Card, which is now photo-plotted and checked (the DIN-41612 connectors are 0.25mm too far from the edge of the board, which will get fixed with a file in the short term) and I believe we now have the layout for the Dual Port Memory. The dynamic RAM chips for these boards have been a source of anxiety. They were ordered from Impulse in plenty of time, but Impulse sold ours to another customer, and it was only after some rather plain talk from Graeme Smith that Impulse set about getting them back. They were supposed to have got to us this afternoon.
The Waveform Interface board problem hasn’t had quite enough attention for me to be sure that everything is okay, but Yohannes has given me marked up prints of his board, and we have told Paul Duesbury what he has to do to generate the “Go” commands necessary to make Burst Mode Imaging work.
I have not seen Peter Milne and Simon this week - maybe next week I’ll have time to talk to them.
Kevin Jackson has arrived back from Tunisia via Mecca, with an impressive sun-tan and an impressive collection of names to drop. He has now tweaked his new improved Blanking Driver to give only one Blanking pulse per input. The edges look fast, but more tweaking is required to get the width down. We have ordered four fast 10G012C drivers from Gigabit for the next Blanking Driver.
Nick Campbell cheered me up no end this evening by telling me that blanking the Field Emission source was going to take a bigger electric field than we needed for the present tungsten and LaB6 sources. Nick’s conclusions were based on discussions with Dr. Plows - as usual, we need a second opinion from Julian.
Bob Taylor has given me a reminder about cable information, which he needs for Monday. Seems like a Sunday job.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 17th March 1989
Most. of this week has been devoted to checking the layouts for the Delay board and the Waveform Processor - Analog board..
The Waveform Processor - Digital is about half-checked and its parts list is considerably further forward - I am now most of the way through the capacitors.
The checking on the Delay board has barely begun - I had to spend about two days last week up-dating the Delay board. circuit diagrams on the Metheus (when I could get access) so that I had a reliable circuit diagram to check against. Last week’s optimism was misplaced - even if I do get through the rest of the checking in jig time, the board won’t go out for manufacture before the end of next week, and I can’t see any safe way of removing myself from the critical path.
The Trigger board remains quiet - Gary Askew is still working out his component placement.
The Waveform Processor - Digital is coming on. Bob Moore has completed his component placement, and sent me a copy by post. The number of integrated circuits has gone up from 150 to 168 as individual gates got collected together into actual packages. I will have to modify last week’s estimated component costs and power consumptions to reflect this.
The drawings on Metheus now seem to be up-to-date, and I have film plots of the latest versions in the hanging fi1e. Dave Ward is coming over on Tuesday morning with the PAL programs, and sometime next week Bob Moore will be sending me marked up versions of the circuit diagrams so that I can put. circuit references on the Metheus circuit diagrams.
The Waveform Processor VME board is still waiting a little final editing before it goes to PCA. I will have to make time for this early this week.
Kevin’s Blanking Driver now looks good - it. should give us a 200psec wide pulse of electrons at the specimen. We now have to integrate it into the Sampling Crate as neatly and quickly as possible. Phil Fick is giving me a Velo of the original 0.5nsec Blanking Board, from which we will scrub those parts of the circuit that we don’t need. The new bits will be drawn on separate sheets (I’ve had to promise Phil that they don’t get onto the Velo) and added onto the original circuit layout on the Metheus. Since the original board was a Double Extended Eurocard, and the new hoard will be a Triple, this shouldn’t be too difficult.
Simon has given me a new cable bible, with instructions to put in my new cables. I shall do what I can, when I can get around to it. There seems to be a shortage of round to-its.
Peter Milne has been asking me questions about the Waveform Processor board, and I have been trying to divert him onto TDS.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 23rd March 1989
I spent the first two days of this week getting the Time-base Interface board into the system - producing a parts list, getting the drawings into shape, and editing the Waveform Interface specification down to a specification for the Time-base Interface, which largely meant removing references to the Waveform Processor boards and the Naffbus.
Since then I have spent about a day and a half on checking the Delay board; I’ve checked about a quarter of the circuit diagram, concentrating on the GaAs logic and its interconnections. I’ve found a minor circuit error; I’ve asked for some minor improvements to the decoupling, and I’ve found some tracking which I believe could be improved by changing the circuit diagram.
I think I’ve been through the critical parts of the board to the point where further checking won’t repay the time it will, take -I’ve asked Phil Fick to photoplot the hoard as soon as the changes have been completed.
I’ve spent some time checking out the input side logic on the Waveform Processor - Analog board, and as soon as Kevan has sorted out the relatively minor changes I’ve asked for, this board will also be photoplotted. Its parts list is no further forward than it was last week.
Bob Ward and I are going to go down to GB Design next Wednesday, to arrive at 10.00 am to start checking out the Trigger board and the Waveform Processor - Digital.
Dave Ward from TDS will be coming over next Tuesday morning with his PAL designs for the Waveform Processor ‘- Digital; I’ll be out looking after my washing machine, but. David Cairns has agreed to provide such hand-holding as proves necessary. Dave Ward hopes to take away PAL models to drive his simulation, we hope to retain enough data to allow us to generate the PAL-programming tables for each PAL.
Kevin is still trying to test his Blanking Driver on the EBT column - at. most recent report the filament had just blown. We seem to have a l00psec step-recovery diode working under the beam when the beam is working, but we haven’t had a proper waveform yet.
Simon’s cable bible now has entries for the various Taxichip cables - he had to write them in himself, but I did help a bit.
Bob Taylor has been presented with the Verospeed catalogue open at the page referring to KM6 components for 9U card crates; he seemed happy enough with this and is now working out new and unusual ways of putting the stuff together.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 31st March 1989
The Timebase Interface card has emerged from ATE and was passed to PCA this morning - Paul Duesbury improved the design during the week, by pointing out that the Timebase Interface wasn’t going to be able to plug into the Naffbus. The board design now with PCA does not assume any such connection.
The Waveform Processor - Analog, is ready for photo-plotting and could go out on Monday. The parts list has not advanced at all -which means that it has now been untouched for a fortnight.
The Delay board will be ready for photo-plotting next Tuesday - last week I had expected that it would be ready this week, but while I stopped checking the board on Thursday last week, my internal post-processor kept on working, and I woke up from a sound sleep that night with the gnawing suspicion that all was not right with the adder on the Delay board. I put. in some overtime over Easter confirming this suspicion and. sorting out possible solutions.
On Tuesday I put in some time with Yohannes and Dave Hall before we decided that our best option was to replace our GaAs 10G100 adders with ECL 100181 adders - this approach did not disturb the component placement, though it gave Rodger quite a lot of localised retracking, which has now been done.
On Wednesday Bob Ward and I went down to Knebworth to GS Designs; Bob Ward spent about four hours with Gary Askew, perfecting the component placement for the Trigger board, while I talked to Bob Moore about the Waveform Processor - Digital, which was pretty much tracked out.
The result of my conversation was that. the Waveform Processor -Digital is now going to go onto an 8-layer hoard. The original. intention was to go for a six layer board, with two inners layers dedicated to the 0V and -2V power planes and a third inner layer largely devoted to -5.2V distribution, leaving one inner layer to take the overflow from the TTL bus which runs all over the hoard.
In fact even the ECL signals overflowed onto the inner layers, and without the extra layers the -5.2V (all 17A of it) would have had to have been tracked out to the ECL; one of the additional layers will be a -5.2V plane, and the other will enable us to track the ECL overflow as strip-line between two solid ground planes.
Bob Moore presented me with a set of prints for the Waveform Processor - Digital, marked up with component references, which I am transferring onto the Metheus drawings as fast as I can. The transfer should be completed early next week.
TDS are still finishing off the PALs for the Waveform Processor - Digital. Dave Ward’s state machine PALs have been completed, and Dave Cox is trying to run some simulations - Yohannes and Bob Ward do not use all the ECL parts TDS has designed into the Waveform Processor so Dave Cox could not get all his HILO models from us, and has not yet concocted all the additional models he needs.
Incidentally, TDS gave GS Designs the wrong pin-outs for the 100474 ECL RAMs - for the flat-pack rather than the 24-pin DIP (which I should have noticed), and when GS Designs woke up to this, they used the 10474 pin-out, which is wrong again (and I did notice).
Kevin has finally tested his Blanking Driver on the EBT, and it looks fine - slightly better than the Avtech. He and Simon are going to try to set up a more direct connection from his Blanking Driver to the blanking p1ates but it looks as if we now concentrate on getting the Blanking Driver onto the Blanking Board, and the Blanking board into the Sampling Crate.
Dave Hall put the hard word on me to get the backplane for the Sampling Crate specified and into PCA this week. I haven’t made it. Bob Taylor hasn’t told me how wide the Sampling Crate is going to be, and I’ve persuaded Simon that he is going to change his mind about the number of power supply leads that are going to terminate on the backplane, so I’ve passed the buck fairly efficiently. There is a sketch of the backplane on Metheus, for anyone who can be pacified with pretty pictures.
Peter Milne has made several appointments to talk to me about programming the Waveform Processor; I have wiggled out of all of them so far, and have taken to checking the immediate vicinity of my desk for SuperGlue, gin traps, and other infernal machines. Once TDS have finished programming their PALs and doing their simulations, Peter and I might usefully make an appointment with them to talk about programming the Waveform Processor.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W. Slornan
subject: Progress to 7th April 1989
This Timebase Interface board has now been in PCA for a week, and is being prepared for sub-contract layout - it should go out next week.
The "Waveform Processor - Analog" and the Delay board are both now waiting for Dave to send them out for photo-plotting; Dave held photo-plotting while I walked Mike Penberth through the entire Sampling Crate, against the chance that we would find a fatal flaw.
I managed to resist the temptation to make a last minute improvement to the Delay board - Keith Smith of Datel drew my attention to a very fast 10-bit DAC they do - the DAC-330 - which could with advantage replace the 8-bit AD-9768 on the Delay board. Fortunately it was a bit big (28-pin versus 18-pins) and rather sparsely specified, so I was able chicken out of the confrontation which the change would have required.
The parts list for the "Waveform Processor - Analog" has moved a bit. I've finished the capacitors and started on the integrated circuits.
Bob Ward and I went down to Knebworth again this Wednesday; Bob spent another four hours with Gary Askew, sorting out detailed components placements, and tracking in the critical areas of the board,
I had a short talk with Bob Moore and gave him two sets of prints of the up-dated "Waveform Processor - Digital" circuit diagrams (including integrated circuit references and some resistor references).
Bob has got the "Waveform Processor - Digital" completely tracked out onto 8-layers (except for the ECL RAMs which he is re-tracking for the third time),
It turns out that he used the 10474 pins-outs because that was what I gave him - the two parts are on successive pages of the Fujitsu memory book, and I copied the wrong page. Embarrassing.
We will get pen-plots for the layout early next week, and a fully checked photoplot about two days later.
The conversation with Bob Moore didn't take long, and I sat in on the session between Bob Ward and Gary Askew for the rest of the morning,
TDS having been coming and going with their PAL models all this week; we have a complete set of PAL programs, and almost satisfactory simulation runs for Dave Ward's "Control" section.
They have used up the 2,000 quid's worth of simulation getting the bugs out of that section, and feel that they ought to spend another 2,500 quid's worth on Dave Cox's "Taxi Interface" section, and a further 1,500 quid finishing off "Control". It would be cheaper than doing the same work on the prototype hardware.
Kevin has put together a package of mods for the Blanking Board to incorporate his driver with the minimum of changes - we will pilot it through PCA and he will be back in a couple of weeks to get it working.
The backplane specification now includes a prettier picture, but it’s otherwise little advanced. Simon has just given me a map of the revised power plug, but Bob has yet to tell me how wide the crate is, so I've still got one excuse left.
Peter Milne and I finally had our conversation, but it mainly emphasised that we need more detail information about the board from TDS, which is coming, so maybe we have just put off the serious conversation one more time.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 14th April 1989
The Timebase Interface board went out for layout on Wednesday, and the completed layout is due back Thursday fortnight - the 27th April.
The "Waveform Processor - Analog" and the Delay boards have now been photoplotted; I signed off the plots this morning, and they are off to Printech today, which means the boards should both be back by May day. The solder paste artworks are going off to Surtech this afternoon, and we will have to kit the boards by the end of next week. Kitting hasn't started yet but we should have all the parts except the connectors, a bit of surface mount TTL and the surface mount equivalent of the 1N916 diode, all of which are available ex-stock.
The parts list for the "Waveform Processor - Analog" has now been completed, and part numbers applied for for all the new components, except the five semi-rigid coax assemblies we are going to be buying in from the Quadrant Meter Company and the homebuilt heat-sink; we need dimensioned drawings for all five connectors and the heatsink, and Kevan is still getting me the dimensions.
GS Designs has taken longer finishing the "Waveform Processor Digital” layout than I expected - rather than having pen plots this Wednesday and photoplots today, the revised schedule gives us pen plots next Wednesday and photoplots next Friday, if we keep checking to a minimum. I made a last minute request for extractors on the board, which seems to have cost a few hours, and it sounds as if the internal checking process threw up a few minor drop-offs.
There is a problem with the parts list for the “Waveform Processor – Digital” - the terminating resistor numbers won't fit on the silk screen (and I am not changing the layout and going to a larger board just to make room for resistor numbers) so these resistors will have to be numbered according to the reference number and lead number of the integrated circuit lead to which they are attached. Bob Moore is marking up a new set of prints with terminating resistors numbered in this way; in due course this information will have to be transferred to the circuit diagrams and a parts list.
We will take the parts list off the marked up print by hand, and put the resistor references onto the circuit diagram later; this isn't the best way of handling the process, but it offers the chance of having a parts list for Surtech before the printed circuit board comes back from Printech.
The Trigger board layout has had all its signal lines tracked in and most of the power connections - Bob Ward and I will have to have a look at the layout early next week.
If TDS have been doing any more simulations on the "Waveform Processor - Digital" this week they haven't had much to say about the results; we will be buying some more simulation time from them but how much is still to be determined.
I haven't been able to put in any time on Kevin's package of mods for the Blanking board; it is urgent, but less urgent than the backplane specification or the extender board specification.
The extender board specification is still in the queue, but the backplane is making progress - the pretty picture on Metheus has now grown power sockets, and socket numbers, so I can now settle down to writing lists of pin numbers, which should go fairly quickly, though not as fast as it would go in undisturbed overtime.
Peter Milne and I got together this week on the Vacuum Control board; Tim Frost had improved the original boards by replacing the original LS240 buffers with HC240 buffers, which have much higher input impedance. What Tim didn't notice was that the LS240 has a Schmitt trigger input, and thus no lower limit on the slew rate of the input signal, while the HC240 requires that the input voltage changes state in less than 500nsec, otherwise there is a risk that the chip will overheat. The board is going back to LS240s for the moment.
to: Dave Hall, Bob Ward, Yohannes Gehrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W. Sloman
subject: Progress to 21st April 1989
The “Waveform Processor-Analog" board is back from Printech; we will try to get Shaun to kit it next week, but the task is of lower priority than finishing of the backplane specification.
The extra parts that will have to be ordered haven't been ordered yet.
We gave up on the dimensioned drawings for the semi-rigid coax assemblies-Kevan and Rodger sent off 1:1 prints from the relevant art-work to the Quadrant Meter Company who had said that this was acceptable; my contact at Quadrant Meters doesn't know anything about this, but promises to give me quotes when the drawings arrive/come to light.
GS Designs have slipped further on the delivery of the "Waveform Processor – Digital” - we won't be able to start checking the pen-plots until next week.
Dave Ward of TDS has undertaken to extract a parts list from Bob Moore's marked-up prints when Bob actually produces the new set of marked-up prints. Dave has agreed to pay for more simulation, and I believe that TDS is getting on with the job. Peter Milne and I are going over to Biggleswade on Monday afternoon to try to get the information that Peter will need to drive the board.
Bob Ward and I went down to GS Designs this Wednesday and Bob went through the Trigger board layout at some length. Several changes that we had asked for hadn't been incorporated but Gary Askew claimed that he was putting off the final polishing until he had tracked the board completely.
Bob marked up a set of prints with the low level pin numbers that Gary had assigned, and is putting them into his Metheus drawings - some have proved to be wrong, and Bob and I will have to do a 100% check on the layout before it can go for photoplotting.
I haven't been able to put in any time on Kevin's package of mods for the Blanking board this week, which means that it has been hanging fire for two weeks.
The backplane specification is down to socket 13 out of 23 - all the decisions have been made, and it is now a matter of typing them in - which is decidedly boring.
I've taken a short break from typing pin numbers to identify a 16-bit DAC to generate the PMT control voltage on Peter Milne's Plinth Control Board(s). The Micropower Systems MP-7626LN is pin-compatible with the Hybrid System DAC-9331 devices already on the company and quite a lot cheaper. We need a 16-bit DAC if we are to fully exploit the averaging capabilities of the Sampling Crate, which can require very fine compensation of very small changes in system gain (ie photomultiplier gain, gun brightness, blanking pulse width).
The extender board specification is still sitting in my job queue.
The job of generating a parts list for the Delay board seems likely to be more time-consuming than I had expected - Metheus can't extract much of a parts list from the current set of drawings, and the fastest option will be generate a list by hand.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W. Sloman
subject: Progress to 28th April 1989
Shaun hasn't done anything about kitting the "Waveform Processor – Analog” board because he has been poached, by the EBMF mob, whose need is even greater than our own.
I haven’t done anything about ordering the extra parts this week either - apart from the semi-rigid coax assemblies for the "Waveform Processor - Analog” and the Delay boards, which are now explicitly ordered and under construction.
GS Designs have slipped even further on the delivery of the "Waveform Processor – Digital” - we won't be able to start checking until next week sometime. This time they have an excuse, of a sort - they had laid out both this board and the Trigger board on the assumption that the 100K ECL was to be supplied in C-leaded PLCC's, whereas it is only available in DIPs and flat-packs. We are using the flat-packs and we have had a tool made to bend the flat-pack leads to a gull-wing of predictable outline.
They don't expect to take long adjusting the layout to accommodate the larger footprint. I'm feeling a bit guilty about not making sure that they were using the right package data - but not too guilty, since nothing in the material we supplied suggested that the ECL was available in PLCC.
Peter and I went over to Biggleswade on Monday, as arranged, and came away much better informed about the "Waveform Processor - Digital"; Peter now seems relatively happy about driving the board, although he was distressed to find out that he does not have read/write access to any of the memory - he can read the Output Store and write to the Waveform Store, and that is it, although I believe we can shift data around on the board to give the effect of universal read/write access, if you wait long enough and the whole system is working.
On the Trigger board, Bob Ward managed to run off an up-dated set of Metheus drawings and put them in the post to GS Designs before he went off sick.
I've finished the backplane specification (apart from putting in a few extra page breaks, and preparing the rough parts list). It should go in to Jim Rose on Tuesday.
A fair chunk of Thursday (including some unpaid overtime) got lost to reworking Dave's paper on multi-sampling, but apart from that I've made very little progress on anything else.
Analog Devices came up with a 16-bit DAC for the PMT control voltage on the Plinth Control board - their AD-7586 is a bit cheaper than the Micro Power System MP-7626, but it is inferior in almost every other respect - the exception is in being monotonic to 16-bits, where it is merely equal.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 5th May 1989
I've made some progress this week - the backplane specification is at last finished and through ATE, while the extender board specification went into the Circuit Design group about half an hour ago, and I've ordered the ultra-funny right-angle DIN-41612 type M sockets for the front of the extender board (happily they are available ex-stock),
Shaun has made some progress in kitting the "Waveform Processor - Analog" but he has just been re-poached by Dave King for the EBMF work. We may have a kit of parts for Surtech by the end of next week, but it can't be guaranteed.
I will be getting on with the parts list for the Delay board next week, which is as well, since the first printed circuit board came in today, for approval. Printech have had a problem getting the solder resist to stick to the cynanate-resin bonded PTFE cloth on the top and bottom surfaces of the board, and we are shipping this first board down to Surtech today, to give them an opportunity to complain about the solder resist.
We will be wanting a kit of parts fairly soon.
GS Designs have slipped a little further on both the Trigger board and the "Waveform Processor - Digital" - as usual, we will have photo-plots to check early next week, which is to say "real soon now". We live in hope.
TDS have almost finished simulating the Control PALs on the "Waveform Processor - Digital". The Reset state has now been made to work. Next week Dave Cox expects to start work on simulating the PALs that drive his Taxichip interface; granting his somewhat cavalier design style we should get value for money out of the simulation. Murphy's Law suggests that this work will reveal the need for a wiring change just after GS Designs has decided that the board layout is finished …
The Timebase Interface board layout has been completed and is now out for photo-plotting. It seems likely that we will try to add to it the Taxichips for Peter Milne's Plinth Control Card, but we need the current version so that we can drive and test the Sampling Crate when it finally come together.
I'm going to a funeral next Thursday morning at 10.30am (an 85-year-old neighbour as was) and I will be off on holiday from lunch time next Friday until the following Tuesday morning - I don't know too much about our destination, but I do know that it involves going to Scotland and appreciating single malts, so I may not be much wiser when I get back. My wife is staying an extra day to take part in a Ph.D. viva - she is pushing for a sotto voce examination, since viva voce might be a bit loud for comfort.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 12th May 1989
Not a lot of progress this week. The backplane specification has finally reached PCA, and Phil Fick expects to have Kevan Purton starting on the layout towards the end of next week, which should give us a completed backplane by Friday the 9th June. I threatened Phil Fick with Dave Hall's celebrated impression of a steam-driven pogo stick, but Phil remained unmoved .
The extender specification will be through ATE this afternoon; Bob Ward got me to make a couple of minor changes to the spec on Tuesday evening and it went into ATE on Wednesday morning, early.
Shaun has kitted the "Waveform Processor – Analog” as far as he can; there are a handful of shortages, but now that all the part numbers for the new parts have come through, these shortages will have to be cleared through the system. He is raising shortage notes now, and someone will have to take them to Ken Lincoln to get him to get the parts ordered promptly.
The parts list for the Delay Board is coming on; I've got through all the capacitors and resistors, which is the bulk of the work (49 items and 528 parts so far). I've also filled out a few part number applications, and spent about a day (in total) on Metheus, up-dating and correcting the circuit diagram to match the printed circuit layout. All five printed circuit boards have been delivered from Printech; Colin Gupta has one on extended loan and two of the others will go down to Surtech when we have kitted against the parts list, when we have a completed parts list to kit against.
GS Designs have - surprise - slipped a little further, but the pen plots for the "Waveform Processor - Digital" are supposed to have been completed last night, and the pen-plots for the Trigger board should have been completed by this evening. Bob Ward may be able to go down and pick them up on Monday, but otherwise I will go down on Tuesday afternoon (I'm in Edinburgh on Monday, and I've got an appointment with the dentist in the middle of Tuesday morning).
TDS are now fairly confident about the Control PALs on the "Waveform Processor - Digital" and are getting on to simulating the PALs controlling the Taxichip interface.
I've signed off the Timebase Interface, photo-plots and the prototype boards are being made - they should have arrived today, but probably will get here on Monday. Shaun now has the parts list, the circuit diagram and the appropriate form. I've asked for the assembled board to be available in week 8 which ought not to be a problem.
Dave made the fatal mistake of asking me for my opinion of his abstract of our paper for Micro Electronics 1989; I spent a couple of hours reworking it to reflect my prejudices. He claims to have incorporate some of my changes, but hasn't shown me a copy of the revised abstract - I don't think we can afford the time.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 19th May 1989
This week's progress consisted of finishing the parts list for the Delay Board, which is now with Shaun for kitting. Bob Ward is fairly close behind with the Trigger Board parts list; between us Bob and I have applied for part numbers for all the new parts on the Delay Board and the Trigger board, and have had the usual discussions about which particular part we ought to be using where.
Kevan Purton has started work on the backplane; I've had to raise a Database Change Request on the type M DIN41612 sockets to give him the 6mm tails he wants rather than the 4mm tails you get on the part I originally specified.
When he has finished that, around the end of next week, he will get onto the extender board; Phil doesn't want to sub-contract the extender board on account of the funny voltages and weird connectors, which strikes me as entirely reasonable. We can probably get the extender board etched and assembled faster than the backplane, so we might have both for the beginning of week 11 {that is by Friday the 9th June).
None of the shortages on the "Waveform Processor – Analog” have been cleared yet; Ken Lincoln has passed the shortage list through to purchasing on the third attempt (Mike Rolfe got him to cut all the quantities ordered down to one board on the theory that Surtech would be supplying all the parts on later boards, and I got him to restore the quantities on all the parts that Surtech wouldn't be supplying). Purchasing have had the list for a couple of days (and it is marked urgent) and the orders are going out: I have checked all the part numbers on System 38 and none of the orders have got on the screen yet, but there is usually a lag there anyway.
I collected the pen-plots for the Trigger Board and the "Waveform Processor - Digital" on Tuesday afternoon, as planned. I spent a little time yesterday looking over the "Waveform Processor Digital" and couldn't see anything even vaguely suspicious, so I asked Bob Moore to start photoplotting last night.
Bob Ward is planning on going down to GS Designs on Monday to have a last run through the Trigger board layout, so we should be able to get that photoplotted by the middle of next week. We have already found one drop-off on the layout - although Bob, Gary Askew and I all share the responsibility for it - so more checking is clearly justifiable.
The silk screens are not going to meet with approval from production. There isn't room on either board to label every terminating resistor. Assembly isn't production's problem, because we are using sub-contract assembly, and ATE have probe cards but final test and service will have to work from assembly drawings, as we did on the EBMF until recently, and still do with some boards.
Bob Moore still hasn't produced the marked up circuit diagrams showing all the resistors, but they are promised for Monday, with the photo-plots.
Once we get them TDS and I can engage in a race to see who can produce a parts list first.
I haven't had any more news from TDS about the progress of their simulations; I will probably go over to see them early next week.
The Timebase Interface board is now assembled and waiting for Yohannes to provide programmed PALs. This will take a few days - Yohannes is now back on our project, but it is taking time for him to remember what he had in mind back in January and he has started with the Delay board, where we also lack PAL programs (although we don't need them as urgently).
Once the PALs are done Yohannes will be able to get onto writing Part B of the specifications, which seems vitally necessary, particularly since Yohannes, as a sub-contractor, will have to go fairly soon, in accordance with the current management orthodoxy.
I've actually got data on the EG and G Model 8300 350GHz Sampling Oscilloscope; EG and G don't sell it any more, because a market survey indicated that there weren't any buyers, but the local agents are going to find out if one could buy it as a "special” and if so, at what price. Who knows? We might get an end-of-line bargain.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 26th May 1989
There hasn't been a lot of progress this week; I've spent most of my time thinking about the changes to the Blanking Board, to accommodate Kevin's Blanking Driver. So far it looks as if everything on the original Blanking Board that isn't going to be thrown away is going to be extensively changed, which isn't quite what we originally expected, and certainly not what Dave wants to hear.
John Hawksworth has kitted the Delay Board as far as he can - I've taken four shortage notes down to Ken Lincoln, and I've got a couple of other shortages to sort out.
The shortages on the "Waveform Processor - Analog" have not yet been cleared; orders for five out of the fifteen parts are now visible on System 38, with deliveries due either today or next Friday. Presumably the rest have been ordered, but not yet entered on System 38.
Jim Rose has been presented with a kitting parts list (that is without component references) for the Trigger Board, and Bob Ward has presented me with a Metheus-generated parts list with component references, organised by part number, which can be translated into one of our parts lists without great intellectual effort.
Kevan was making good progress on the backplane until the Applicon system crashed - he should finish it and get onto the extender board early next week.
GS Designs have just finished the photoplotting on the "Waveform Processor - Digital" and I expect to have the photoplots real soon now (they were supposed to arrive before lunch). The marked-up circuit diagrams are now going to arrive with the photo-plots for Bob Ward's "Trigger" board on Tuesday morning - Bob Ward found some more bugs in the Trigger board layout last Monday, but they were relatively straight-forward to sort out.
Yohannes is still wrestling with his various PALs; he is making progress, but Meth 1 hasn't been too accessible, and something very odd happened with the Timebase Interface board files.
At the present rate of progress we won't have the Sampling Crate assembled before the 16th June (the end of week 11).
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 2nd June 1989
This week's element of progress was the arrival of the Trigger board and "Waveform Processor – Digital” photoplots on Tuesday morning, with the marked-up prints for the "Waveform Processor - Digital" showing all the terminating resistors.
Phil Fick has now had contact prints made from the photoplots, and the copies are now on their way to Printech; we can expect boards on the 16th June (end week 11).
I produced a second set of marked-up prints for the "Waveform Processor - Digital" from Bob Moore's originals, and gave these to Dave Ward of TDS on Wednesday morning, along with a good handful of Cambridge Instruments' parts list forms. Dave Ward has promised a completed parts list by the end of next week; this gives us a week to assemble a kit before the board comes in from Printech. Jim Rose believes he can have somebody available to kit the board as soon as the parts list comes in.
Kevan Purton has now completed the Sampling Crate Backplane layout, and it is now being checked. We can expect to get a complete back-plane back from Dowtv around the 23rd June (end week 12) which is the earliest we could have loaded Trigger boards back from Surtech.
Kevan won't get onto the Extender Board until next week; by paying for 5-day turn-around we should still be able to have a Sampling Crate Extender board to hand shortly after the 23rd June. The connectors for it haven't come in yet; Barlec have the parts, but we owe them £21.00 since last August, which will probably get paid now.
The shortages in the "Waveform Processor - Analog" kit are still being cleared; five of the fifteen have been cleared, and a sixth item is due in today. When I chased up the remaining nine items, nobody was prepared to claim that any of them had been ordered - since then most have been ordered (but the orders are not yet on System 38) - and we may be able to move the kit down to Surtech sometime next week.
As far as I know, all the shortages on the Delay board are being cleared, many of them by the same orders as are clearing the "Waveform Processor - Analog" shortages.
Jim Rose is about to start the kitting of the Trigger board; this should be completed early next week.
Yohannes is still wrestling with the PALs for the Timebase Interface and the Delay board; he has been having trouble getting enough time on Meth 1 to run his HiLo simulations and neither set of PALs is finished; the Timebase PALs should be completed today, and the Delay PALs, while technically complete, still could do with a little more simulation (before we commit our very limited stock of ECL PALs).
As a result of Wednesday afternoon's progress meeting I spent a large chunk of Thursday writing a note for Peter Milne on S-curvesr and "closed loop” waveform acquisition. This has started Peter delving into the old Energy Filter board, and may produce some serendipitous improvements.
Progress on the Blanking Board has suffered from all of this; neither drawing nor specification has advanced very much since last week - I now know exactly what I want to do, but I still have to document it.
(Note added 3-08-2017: “Closed Loop” was a way of doing voltage contrast where the energy filter grid in the through the lens detector was varied to reflect the voltage appearing on the specimen being examined at the instant the stroboscopic flash of electrons had hit the surface. Since the secondary electrons knocked out of the specimen surface took some 50 or 60nsec to get up through the final lens to the filter grid, we had a fair bit of time to let it settle before the electrons go to it, but we then would have liked to set up the grid to match next voltage in no more than 40nsec. For voltage excursions from -10V to +10V we could manage this, but we also had a much slower system that could swing over about +/-30V and took closer to 1usec to settle.
The theory was that if you set the Filter Grid about 3V more negative than the surface, you rejected about half the secondary electrons, and were working a the point where the proportion of the electrons that got through the grid was most sensitive to the voltage difference between grid and surface. It was probably the most useful mode of operation.
The S-curve – Sensitivity Curve – was a plot of detected secondary electrons as a function of the voltage on the filter grid, taken with the specimen surface at zero volts. It started falling noticeably as you took the filter grid below 0V, got to about halfway down at -3V – for most substrates – and declined a lot more slowly below -6V)
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 9th June 1989
There has been a certain amount of progress this week; TDS gave me the parts list for the "Waveform Processor - Digital" this morning, and I have now added part numbers for most of the parts and applied for part numbers for the rest. I've still got to add the part numbers for the mechanical bits - extractors, pins, stiffener, and label - but that is a five minute job. I haven't got all the surface-mount TTL parts - we didn't buy the ex-stock parts in advance - and I've now ordered eight of the nine items from Access, where they were ex-stock, The nineth will probably be ex-stock from Macro and I'll sort that out on Monday.
I'll give the parts list to Jim Rose for kitting on Monday.
Eddie Newell is kitting the Trigger Board at the moment; I don't know about the shortages on that yet.
I created a minor disaster on the Trigger Board PCB artwork by leaving in an instruction to use 0.005 thou tracks for 100R transmission lines; these appeared on layers 1, 2, and 6 of the artwork, which meant that Printech could not print them. We paid 140 quid to GS Designs to get the three layers replotted with 0.008 thou tracks where there had been 0.005 thou before (20 quid to change the artwork, 40 quid per layer for replotting) and the new plots are now at Printech - the board should still get to us on the 16th.
Yohannes found a bigger bungle when he started testing the Timebase Interface board - the plug labelled Pll on the Timebase Interface is in the position which plugs into Skt-2 on a VME bus. This is not right - neither PCA nor I should have signed the board off.
PCA has already move the plug, and are getting two more boards made for 19th June. Meanwhile Yohannes is testing the existing board on a stripped down extender; so far he hasn't run into any insuperable problems.
The Sampling Crate Backplane has been checked, and is now being photoplotted. I haven't yet been told that we won't get it by the 23rd June, but we presumably won't get a firm date until the artworks have gone to Dowty.
Kevan doesn't seem to have done anything on the Extender board this week. This is a bit worrying.
The shortages on the "Waveform Processor – Analog” are still being cleared. Four items are still outstanding. The only critical item - 8 BAS16 SMD diodes - has been in the post from Jermyn since Monday.
The shortages on the Delay board kit are waiting on two orders I put in to purchasing last week; I've been through Paul Detheridge's in-tray, and they are no longer there, so the orders should have been placed, but I haven't got any paper-work which I can easily chase.
It seems that Purchasing have not replaced Graeme Smith in any effective way, and the remaining staff are getting snowed under; I asked Mervyn for four telephone order numbers this afternoon and put them through myself. Mervyn doesn't like this, and I'm a rather expensive buyer, but I don't think we can get by any other way.
I've put in a bit more time on the Blanking Board, but nowhere near as much as I would have liked to - acting as a progress chaser takes a lot of time. Tidying for Terry didn't help either.
(Terry Gooding owned Cambridge Instruments at the time, and managers would make sure that the place looked tidy when he was expected to make a visit).
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 16th June 1989
There has been quite a lot of progress this week. The kits for the two Delay boards and the "Waveform Processor – Analog” are now with Surtech.
The kits for the Trigger board and the "Waveform Processor Digital" are sitting on my desk at the moment while I work on the shortages.
The shortages are mostly embarrassing - we ran out of 100136 ECL counters, 100124 TTL-to-ECL converters, and 100114 ECL line drivers. I thought I had bought enough ECL parts to populate one extra board. Fortunately all three parts are ex-stock from Macro, and will be here on Monday, by Datapost.
The last of the TTL surface mount parts for the "Waveform Processor - Digital" that I ordered last week came in today. The one I managed to miss last week will come in on Monday, as should the TTL surface mount parts for the Trigger Board, which I ordered this morning, along with the surface mount transistors and the delay lines - apart from four of the delay lines which won't be ex-stock again at Farnell before the end of the month. We have been promised four free samples by the manufacturer, and these should arrive before we get the Trigger Board back from Surtech, so that we could solder them in ourselves and get to testing immediately.
The less embarrassing shortages - like 24-pin sockets and DIN-41612 connectors - will probably get sorted out on the same sort of timescale. I'd prefer to see these components soldered in by Surtech, but we can hand-solder the parts, albeit at some cost to reliability.
Mike Rolfe has rough parts lists for all the boards and for the Sampling Crate Backplane. He will get them structured on System 38 as soon as possible, and order for the next set of boards immediately this is done; which is to say, I have conveyed Dave's wish that we start ordering for the next machine and spares as soon as possible, and Mike has agreed to expedite this.
Kevan has made a start on the Sampling Crate Extender board, but he won't be able to make any serious progress until Phil gets back next week. I can't see us getting an extender before the end of the month.
Mervyn Rayment has a new electronics buyer starting on Monday, which should get me out of his hair, and there is apparently approval for yet another buyer, which strikes me as an unusually sensible decision.
The Blanking Board circuit diagram has grown a few more components - I've spent most of this week as a progress chaser, again, so progress has not been as I would have liked.
Next week should see a massive reduction in progress-chasing, but I've got to resume my career as a CAD draughtsman sometime soon, to get the "Waveform Processor - Digital" drawings up to date. All the Metheus terminals are booked up solid all next week, so it isn't going to happen soon.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 23rd June 1989
There hasn't been much progress this week. Surtech expect to have the Delay boards and the "Waveform Processor - Analog" loaded by the end of next week.
The kits for the Trigger board, and for the "Waveform Processor - Digital" are now very nearly complete - the remaining shortages can either be supplied by Surtech or added after we get the board back from Surtech. We haven't sent the kits to Surtech yet because we haven't had the printed circuit boards back from Printech; the boards were promised for Wednesday on Monday, and for today on Wednesday, and while the Trigger board has just arrived (3.20pm) the "Waveform Processor - Digital" is not yet with us - the entire batch was lost and Printech will be working over the weekend to get us replacements for Tuesday morning.
The corrected Timebase Interface boards arrived on Wednesday, and Jim Rose has now had one kitted - there are three shortages, but nothing particularly difficult. If the worst comes to the worst we can lift the missing parts off the existing board.
Kevan has pretty much finished the layout of the Extender board, which means that after checking and approval it will probably go out for photoplotting by the end of next week (30th June).
Mike Rolfe thinks that the rough parts lists for the Sampling Crate boards will be on System 38 by the middle of next week, after which we can wind up the newly augmented Purchasing Department to buy us bits for the second prototype and the spare boards. The new buyer in Purchasing is now buying things, but this week the extra pair of hands probably used up more effort in training than she contributed to the buying operation.
The expected massive reduction in progress-chasing didn't happen. Maybe next week.
The Blanking Board has inched a little further forward, but isn't finished yet.
I've got a decent lump of Metheus time booked next week to sort out the "Waveform Processor - Digital" circuit diagrams; some of it is after normal hours, and I will be working Flexitime to cope, but no overtime.
I've finally obtained a copy of my contract of employment from Personnel, and it still says that I get paid for authorised overtime - if the overtime is sufficiently authorised to qualify for time off in lieu, it strikes me that it is sufficiently authorised to qualify for the contractually determined payment.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 30th June 1989
The latest word from Surtech suggests that they are still working on the "Waveform Processor - Analog". There has been no similar contact about the Delay boards, which suggest either that the parts list and board layout matched exactly, or that Surtech hasn't got onto it yet. My money is on the latter.
The Trigger board went to Surtech by Securicor on Monday morning; again there has been no feedback.
The "Waveform Processor - Digital" board suffered a second disaster at Printech; when Printech laid down the track side solder resist they noticed that it had a lot more holes in it than it should have had. After some consultation, Printech stripped off the unbaked resist, Bob Moore at GS Designs plotted out better solder resist artworks, and sent one copy of each to us and to Printech. The board is now due in later this afternoon.
Shaun has finished loading the corrected Timebase Interface board. We should be able to use it to talk to the original board to check out the Taxichip receiver section. Last week's shortages were illusory; two unused sets of parts were resting in the technicians cupboard from the first board.
Yohannes is writing up the Part B Specification for the Timebase Interface board; he has finished a first draft of the Part B Specification for the Delay board, and I will be reading it over the weekend.
The Waveform Interface board arrived from Syscom this afternoon. It is kitted and will be loaded as soon as PCA release it to us.
I've okayed Kevin's layout for the Extender board, and it should be back on the 10th July for assembly.
The Sampling Crate Backplane won't arrive until next Tuesday. The Siemens DIN-41612 sockets were not available ex-stock from the main stockist, and Dowty had to ring around a bit to get them.
The parts list for the Sampling Crate boards and the Timebase Interface board are on System 38. Mike Rolfe is out today, so I can't ask him whether he has wound up Purchasing to buy the long lead items.
I've spent most of this week on the Blanking board. The circuit diagram is now finished, bar a few capacitor and resistor references, and the specification is well forward. It looks as if we can speed up the output stage a bit, now that we have got a -35V supply - with a -20V supply the driver stage couldn't be biassed below -16V but it looks as if we can move it down to -18V, which should speed up the relevant transistors.
I put in some time on Metheus, and one of the nine pages of the "Waveform Processor - Digital" circuit diagram is now up-dated. My domestic arrangements prevented me putting in as much time as I had hoped, and I ended up working 1.25 hours of unpaid overtime (just to make matters worse).
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 7th July 1989
By now Surtech should have sent us the loaded "Waveform Processor - Analog" board, and have finished loading the Delay boards. The Trigger board should be loaded on Monday, and the "Waveform Processor - Digital" should be loaded by the end of next week.
I've had a query from Surtech about some undocumented capacitors on the Trigger board, but I've got no other evidence of progress. I'll go after the "Waveform Processor - Analog" on Monday.
The "Waveform Processor - Digital" went to Surtech last Monday; the board already needs two cut and link modifications.
The corrected Timebase Interface board works as well as its predecessor; we haven't tried looping one board back into the other - the errors and omissions that might have made it practicable have now been corrected by cut and link, and it does not seem worth undoing the corrections.
I read Yohannes' Part B Specification for the Delay board, and managed to prove that I had read it by finding a bit he could write some more about; the latest version looks pretty good.
The Waveform Interface boards are back at Syscom for loading, with their kit of parts (except for the 15 shortages, which seem to be clearing rather slowly).
I still haven't seen the Sampling Crate backplane although it is supposed to have been dispatched from Dowty; there was a cock-up on the power connector orientation which doesn't seem to be too important, but which slowed up Dowty a bit.
Mike Rolfe wants me to check the parts lists for the Sampling crate boards as they now exist on system 38 - this should happen next week. Purchasing isn't buying against the parts lists yet - the board level parts lists have to be fitted into the structure for the EBT2000 as a whole, and that is still in progress.
The specification and circuit diagram for the Blanking Board are now both complete; Jim Rose has a copy of the specification. I've got through the resistors, capacitors and most of the diodes on the rough parts list so I should be able to get the Circuit Design Group and PCA to give estimated arrival times quite soon.
I've put in a bit more time on Metheus on the "Waveform Processor Digital" and I've now got another page of the circuit diagram up-dated. The rest of the circuit should go rather faster.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Paul Austin, Kevin Jackson, Peter Milne, Simon Dawes, Trevor Sexton
from: A.W.Sloman
subject: Progress to 14th July 1989
Surtech have sent us the "Waveform Processor - Analog" board and one of the Delay boards. They broke a 10015QFC ECL latch, and the other Delay board is waiting for me to send them a spare so they can fit it.
There are five shortages on the "Waveform Processor - Analog". The two sockets on the front of the board and the AD767 DAC have to be dealt with fast but the TP-1464 op-amp and one of its feedback resistors we can survive without (until we want to demonstrate +/-30V Closed Loop operation).
On the Delay board there are some 16 surface mount resistors and capacitors to be added, as well as Yohannes' four PALs and the Taxichip isolating transformers.
The Groatmoor rework machine is up and working, so we should have most of the Delay board bits in place on Monday.
The backplanes are now in and one has been built into a Sampling Crate. Bob Taylor is going to try and get the power supplies wired up from the socket on the connector panel to the plugs on the backplane.
I've got three Extender boards sitting on my desk, that have to be fitted with DIN-41612 sockets (we've got them) and RG-405 links (must order them - on Monday).
I still haven't checked out the Sampling Crate parts lists on System 38 - both "Waveform Processor - Analog" and Delay board parts lists have been found to contain minor deficiencies at Surtech, which means that I shall be checking and correcting simultaneously.
The Blanking board specification has now come back from ATE and I can start trying to get an estimate on completion out of Phil; there are bits missing off the circuit diagram, which I hope to correct on Monday.
The "Waveform Processor - Digital" circuit diagram is now up to date, all nine sheets of it, and ATE has a copy of every sheet.
Paul Austin started on Monday and seems to be digging his way into the Sheep Pen.
The Fast Head Amplifier board is now working on the new EBT, about eight months after we got the board assembled. It probably needs a slightly smaller peaking inductor, but otherwise seems fine.
(Note added 2013-03-12: The Sheep Pen was formally known as the RAM store, and was a large chunk of Random Access Memory designed at Lintech to hold short sequences of video images of the surfaces of integrated circuits under test. It wasn't a particularly useful diagnostic tool, but it made for impressive demonstrations to potential customers. The RAM was spread over a number of double Eurocards which plugged into Lintech's own backplane, always called the NaffBus.)
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Paul Austin, Peter Milne, Simon Dawes, Trevor Sexton
from: A. W, Sloman
subject: Progress to 21st July 1989
The first Delay board now has all its surface mount and conventional components except the coaxial cable links; these will go in on Monday.
I would have got this done sooner, but Surtech came after me on Tuesday for the values for the resistors missing from the "Waveform Processor - Digital" parts list - some 29 in about 400.
It took a couple of days to find each resistor on the printed circuit board, work out what it was connected to, and find the relevant node on the circuit diagram. In the process I found four more resistors that had been left off the parts list, and some rather eccentric tracking on the printed circuit board, which may give us trouble (but probably won't).
While I was wrestling with that (and Dave's suggestions that I drive down to Surtech, which wouldn't have helped that problem) we finally got the shortage list for the Trigger board, which was reasonably short (only three items had been left off the parts list) and easily sorted.
By yesterday afternoon Surtech had all the information they had asked for, and all the parts it is worth getting them to fit. I think they are getting on and finishing the job, but Paul Jones, who was asking most of the questions, has been off sick yesterday and today, so I haven't been able to get a delivery date.
The Backplane has been put into the Sampling Crate and Peter Few has made up the coax cables, and is making up the power connectors.
The Extender board ran into a hold-up - the coax connectors for the RG-405 links are on three weeks delivery. We should have had a stock, but it got used up when I absent-mindedly ordered one set of cables for three boards, rather than one ... The first Extender board will use RG-174 links, rather than RG-405 semi-rigid coax. We will lose some edge-speed on the GaAs signals, but everything ought to work.
I still haven't checked the Sampling Crate parts lists, but Phil Buckle has been going through the Delay Board list, and it is apparently full of drop-offs, not that my original was perfect...
Rodger Snook was supposed be starting on the Blanking board on Monday (24th July) but Q.570 mods look like tying him up for another week. This is awkward.
Kevan has gotten started on the Blanking Driver, but didn't make much progress this week - next week should be better.
The "Waveform Processor - Digital" circuit diagrams have been brought up to date again, with the parts list, and ATE are being fed the revised circuit diagrams. TDS haven't given me the revised PAL data, but promised it for next Tuesday when I pushed.
The Fast Head Amplifier board still seems to be working on the new EBT, although it took me some time to prove this to Peter Milne earlier in the week. The board now has a 0.33uH peaking inductor, but I don't yet know what difference this makes to the output pulse.
Paul Austin is still delving into the Sheep Pen, and asking more difficult questions about it. He has been carrying rumours back from Syscorn that suggest that the Waveform Interface is beginning to work. I am trying to ignore them.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet
Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A.W.Sloman
subject: Progress to 28th July 1989
The first Delay board is now complete, bar one coaxial cable. I may eventually put heat sinks on the white 100K ECL packages (they are white because the top of the package is white, high thermal conductivity BeO, rather than the usual black ceramic). The more powerful Gigabit GaAs devices are already sporting their heat sinks, which are purpose-designed by Gigabit, and look quite elegant, but the ECL will probably get hexagonal heat-sinks intended for diodes, which will look revolting.
The second Delay board arrived on Tuesday, with the "Waveform Processor - Digital". This Delay board is short its four PALs, some of the semi-rigid coax links, and its heatsinks. I'm holding off on having the PALs programmed until we have powered up the first board; the coaxs and the heat sinks will be fitted as soon as I find the time.
The Delay board circuit diagrams and parts lists have been up-dated to include the components that Surtech discovered to be missing.
The "Waveform Processor - Digital" arrived short a few surface mount components on the back of the board; these have now been added to the board. In the process I discovered a drop-off on the circuit diagrams - a signal left one sheet as a TTL output, and arrived on another at the input to an ECL gate - which has been reflected on the layout. It can be corrected by a small cut and link. At the moment the board is short two ECL packages to allow access for the cut and links required; these will probably be effected next week, after the Delay boards and the Trigger board have been sorted out.
The board itself is a little thicker than it ought to be, and binds in the card guides in the Sampling Crate; I'll file it down a bit (which won't interfere with active parts of the board).
None of the PALs for the "Waveform Processor - Digital" has been programmed yet - Paul has been lumbered with the job of translating the Metheus files into Abel format on the VAX.
The "Waveform Processor - Digital" circuit diagrams and parts lists have now been up-dated to correct the errors revealed by Surtech.
The Trigger board arrived back from Surtech this morning. Apart from known shortages, it is missing a transistor and a couple of capacitors. Bob Ward expects to be able to sort this out on Monday, and fit the PALs he has programmed for the board.
The Sampling Crate is now waiting for the connector panel; we wouldn't need that to test a single Delay board, but we may have the connector panel before we are really ready to put power on the first Delay board.
The first Extender board is about half-assembled - we have 8.5 of the 20 extender cables, and the board itself sports a full set of DIN-41612 type M plugs and sockets, although we haven't started loading the coax inserts.
Nothing has happened on the 200psec Blanking Board, but Kevan Purton has reworked the Blanking Driver, and I have to check it over before next Tuesday, when Kevan gets back.
I still haven't checked out the Sampling Crate parts lists, but Mike Rolfe has got the parts ordered anyway.
The Fast Head Amplifier is working again; the problem was in the photomultiplier. The Philips XP-2982 has a conducting film over the entire outer surface of the tube, which is connected to the photocathode. In order to protect the world from the 2kV which can appear here, the connection to the film and the photocathode is taken through a 10M resistor.
When the photomultiplier rubbed on the grounded edge of its box, the film and photocathode were both grounded, and the photoelectrons emerging from the photocathode saw a first dynode which was much more negative than the photocathode, rather than 260V more positive. This apparently produced the observed reduction in gain.…
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A. W.Sloman
subject: Progress to 4th August 1989
The first Delay board really is complete - apart from the heatsinks on the high power ECL.
The second Delay board is waiting for its PALs - I don't want to blow them until we have powered up the first Delay board - and its heatsinks. We have run out of the Gigabit Logic heatsinks (which probably means that a packet of ten is hiding somewhere) but I've got twenty of the slightly smaller version coming in tomorrow.
The Trigger Board is having its heatsinks fitted and its plugs soldered down - it spent Thursday waiting for Shaun to become available to do this and he is not enjoying the job - several of the semi-rigid coax links are proving a bit too rigid, and will have to made longer on future boards to accommodate a stress-reducing loop.
After that Bob has to fit the missing transistor; it has now come back from Surtech, and Bob is now working out how to fit an SOT-89 device on SOT-23 pads (and still have it able to dissipate 360mW - we will probably glue on a little heat-sink).
The Sampling Crate was finished this morning, connector panel and all. We should be powering up the first Delay board soon, now that we have a cable to connect crate to power supply; we need a 9-pin D-type extension cable made so that we can keep the Head Amplifier powered while we fiddle with the Sampling Crate on the bench.
Peter Few had to dismantle power plugs PL8, 18 and 22 on Thursday morning and move the pins around - the pin numbers on the backplane silk screen were even more different from the pin numbers on these plugs than I had anticipated. The backplane specification has been corrected for this and other drop-offs, and a revised copy sent to Jim Rose.
I've got a 5MHz (strictly a 4.998 790 MHz) source to plug into the backplane in place of the Trigger board to get the Taxichip link going. Bob Ward provided the 5.000 MHz crystal, Jerry Prusiewicz the LT 1016 comparator to excite it, and I found an Am 2965 TTL buffer with internal damping resistors to drive the backplane. I haven't been able to plug the assembled circuit into the backplane yet, but it drives an oscilloscope probe without difficulty.
We have also got an Extender board, after a little drama - Quadrant Connector Company sent us 23.2415.421 inserts (which are used in D-connector shells, rather than DIN-41612 shells and are externally identical and interchangeable) which we fitted before we found that they wouldn't mate with the 53.1415 inserts in the backplane. So we cut them all off and sent them back to QCC, and got 25 53.2415.421 inserts within six hours of telling QCC that there was a problem. Getting the new inserts onto the cable took a little longer.
Rodger Snook has pretty much finished the 200psec Blanking Board, despite my trick of giving him a circuit diagram showing 10G000 quad 3-input NOR gates as OR/NOR gates with complementary outputs. It took about half an hour to sort out the circuit diagram, and put another fifty quid on the ESC. A subtle error would have been much more expensive.
Kevan Purton has pretty much finished the mods to the Blanking Driver board, so both boards should go out for manufacture next week, in time to be ready for Kevin Jackson on the 14th.
Nothing much has happened to the "Waveform Processor – Digital”. Paul has pretty much sorted out the PAL information, so we should have programmed PALs early next week, and I'll try to get the cut and link mods done soon.
The "Waveform Processor - Analog" now lacks only the TP-1464 amplifiers, which ought to get to us today, if Manhatten Skyline are to be believed. We had this sort of message several times from MCP, which is why the order on them finally got cancelled, but we can hope that Manhatten Skyline is more reliable.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A. W.Sloman
subject: Progress to 11th August 1989
The Delay board was finally been plugged into slot A and powered up late on Monday afternoon. This did not appear to damage it.
When we finally got it cabled up to the Timebase Interface, late on Tuesday afternoon, we found that the Taxichip receiver wasn't working, initially because the input buffer, IC59, wasn't connected to the +5V and 0V rails, and, once this was corrected, because the transformer wasn't working as intended.
In the process of looking into this, late Wednesday afternoon, I killed IC59, which is a 100114FC, one of the three ECL devices for which I have no spares - Janine ordered ten 100114FCs first thing on Thursday morning, against the production number, and I spent most of the rest of the day making a transmission line transformer for the Taxichip interface.
The 100114CFCS came in first thing this morning, and one of them has now restored the Delay board to a nominally working condition.
I spent the rest of day making another transmission line transformer, and comparing the new devices with the original design; the best of the transmission line transformers consisted of 14 turns of 50VMTX sub-minature coaxial cable on an FX4053 toroid; it is flat from 0.5MHz to 500MHz.
Five turns of the same cable on a high frequency RM6 core has slightly better high frequency performance, but a lower limit around 20MHz; swapping the high frequency ferrite for a low frequency ferrite has little effect on the high frequency limit, but drops the low frequency limit to about 2.5MHz. Any one of these transformers should support the Taxichip link.
The original transformer had very little bandwidth at all; it drooped below 1MHz, and had an upper 3dB point around 3MHz, which is one thirtieth of the bandwidth we need for the Taxichip link - I had planned to check out the design, but it never seemed to be the most urgent job, and I haven't yet worked out how I cocked up the design quite so thoroughly. I owe Syscon an apology, and a couple of transformers.
I still have to try winding a transmission line transformer with twisted pair; sub-minature coax gives us very good high frequency performance, but the transformers are a pig to build.
The "Waveform Processor - Analog" is now complete; the high voltage driver amplifiers came in on Thursday, from Manhatten Skyline, who claimed to have had the parts since the end of last week, but to have been waiting for the last of the Cambridge Instrument credit references to come through, before putting the amplifiers in the post. It will probably be ages before we can get to test it.
The Sampling Crate turns out to have faithfully reproduced a drop-off in my original Backplane Specification - +5V power got left off three sockets. I'd corrected the specification months ago, but the backplane had to be corrected with heavy copper wire.
The Extender board works; the coax inserts are rather wobbly on RG-174 cable, and it is quite difficult to plug the Extender Board into the Sampling Crate, although it is easy to plug the Delay board into the Extender or the crate.
Once we get the semi-rigid coax links (Quadrant Connector Co. are building them now) the Extender Board should plug in much more easily.
The Blanking Driver has now been laid out to my satisfaction, and I signed off the photoplots this afternoon. The 200psec Blanking board is not far behind; it was being checked this afternoon. Both should be ready for Kevin Jackson when he shows up on the 21st August (he has rung and checked the revised date).
Paul has almost finished off the PALs for the "Waveform Processor Digital". Two minor contradictions remain, which TDS will have to resolve.
The "Trigger Board" is still waiting to be tested - Bob put a 2N2905 transistor on the SOT-23 pads, then I knocked off both transistor and pads while examining the board with Colin Gupta; Bob thought that he could undo the damage today, but he hasn't shown me the restored board yet. This is probably a precaution, rather than a delay ...
Dave has just received a draft of the "New Electronics" piece on the EBT. I noticed that my name was spelled "Slowman" and Lintech "Lintec", which means that Mike King doesn't meet the minimum standards of reporting accuracy. His grasp of technical matters isn't any more impressive.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A.W.Sloman
subject: Progress to 18th August 1989
The Delay board is a little further forward - it now looks as if the Taxichip link is writing data to the board, and sending data out again. Yohannes had to modify the Timebase Interface to get it to send the right addresses, and the Timebase Interface will have to be modified again before it realises that it is receiving the right data, and puts it on the VME bus where we can look at it.
A problem - possibly the problem - with the Timebase Interface Taxichip receivers is that originally (May 1987 data sheet) the Taxichip receiver Clk output was described as suitable for driving the oscillator inputs of subsequent receivers, while the current data sheet (May 1989) says it is quite unsuitable; this means cut and link mods on the Timebase Interface board, the Delay boards, the Trigger board and the Blanking board, and worse on the Waveform Processor.
Both Delay board and Timebase Interface boards are now sporting new isolating transformers for the Taxichip links - a transmission line transformer wound with a twisted pair transmission line (two lengths of 36swg insulated copper wire twisted together) is flat up to about 130MHz, and okay down to below a 100kHz, and relatively easy to wind. The coil winding shop made me two without complaining, which exhausts our stock of cores - there should be 50 new cores in stores on Tuesday, and we will order the next eight transformers then.
The semi-rigid cables for the first three Extender boards have arrived; I'll change-over the present Extender board (from RG-174 excessively flexible cable) when I next have to pull it out of the Sampling Crate.
Three Blanking Driver boards are sitting on my desk waiting to be loaded; I've completed a parts list, and chased up the 50R microwave resistors (7 arriving Monday) and the 75mA PIN diode (10 arriving Monday). Simon has got the pins coming from Farnell on Monday, and I hope nothing else is going to be awkward (faint hope ...).
The 200psec Blanking boards (on which the Blanking Driver is a daughter board) won't be here until Tuesday afternoon. I hope we can kit it before then - probably another faint hope.
Paul has now finished the PALs on the "Waveform Processor Digital"; they are in the board, waiting their turn to be tested. The Waveform Processor Taxichip Transmitters are driven from the Clk outputs of the Taxichip Receivers, which is not now recommended (see above). We will probably have to add a little daughter board, carrying a low-jitter, varactor-tuned oscillator, phase-locked to the Clk output, to provide the low jitter drive that the Taxichip Transmitters need, before the system will work as it was designed to, or even work well enough to let us test the PALs.
You know, I remember congratulating the ineffable Dave Cox on his ingenious scheme for locking his transmitters to his receivers. I would appreciate any suggestion for a diplomatic way to draw the new data sheet to his attention; my own imagination is producing nothing that strikes me as less than barbaric.to Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A. W.Sloman
subject: Progress to 25th August 1989
The Delay board is now communicating with the VME bus; the critical problem turned out to be that the Taxichip transmitter sends "commands” rather than "data" if any of the "command” inputs are high, and several of the "command" inputs on the Delay board transmitters had been left open circuit to float high.
Solving this problem meant that the Taxichip link worked; we couldn't write data to the ECL memory on the Delay board until I had removed IC8 (an 100124 ECL-to-TTL translator) and replaced it with a new device in the right orientation (Surtech put the original on 90 degrees CCW). As mounted, the device pulled down a TTL enable line to -0.45V, disabling IC12, 16 and 17 as well.
We have now written data to memory location 0000, and read it back again. Accessing any other address depends on the 800MHz clock from the Trigger board to generate the 100MHz clock on the Delay board, to clock the address data into the 100136 counters that serve as address latches for the memory.
Further progress depends on getting the Trigger board working. We have powered it up, but it draws a lot of current from the +5V rail; enough to pull it down to 4.65V at the DIN-41612 plugs, and to 1.45V at the 50MHz crystal oscillator. The resistance from the +5V to 0V is about 2.0R - 4-terminal resistance measurements give us a minimum of 1.885R near R288 on the 800MHz oscillator around IC29. Removing IC29 doesn't make any obvious difference. The next move is to start cutting tracks, which is unattractive, particularly since the 5V rail is tracked in part on the inner signal layer and working out what is connected to what via where is going to be tedious.
The Extender board has been changed over to semi-rigid coaxial links, and as expected, plugs into the Sampling Crate much more easily.:
Kevin loaded the Blanking Driver on Monday, and ran it up on the old test rig, where it works slightly better than the last version. We have to remove the surface mount inductor, and narrow the tail track on the output long-tail pair, but the board is otherwise fine.
Three 200psec Blanking boards have been hanging around all week, waiting to be loaded. I've got the 51R and 75R SMD resistors onto the first board, Paul has programmed a PAL for the board, and stores is busy kitting the rest of the components, so we should be able to get it loaded next week.
I haven't even thought about the changes to the "Waveform Processor - Digital”. Maybe I'll find some time soon.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A.W.Sloman
subject: Progress to 1st September 1989
The process of debugging the Trigger board continues. Last week's problem turned out to be that the +5V rail was shorted to the -2V rail at two via holes, one at IC31/16 and the other close by at C67. Both have been drilled out and the +5V rail linked through.
When trying to check out the 800MHz oscillator it became obvious that IC33 was not performing to specification; when I removed the heatsink it could be seen that IC33 had been mounted with the same orientation as the adjacent GaAs devices, although the board layout and the silk screen require that it be mounted at 90 degrees widdershins (anticlockwise, for those who prefer the Romance vocabulary).
Removing IC33 and replacing it with another GBL10G061C (costing 135 quid), oriented as intended, improved things considerably - we still didn't have any evidence of local oscillation, but at least the divider outputs sat in the range 0V to -2V, rather than at -3.4V.
Putting a 1nF UHF capacitor across the end of the length of coax which forms the tank circuit for the oscillator at least persuaded the circuit to oscillate, albeit at 450MHz rather than 800MHz.
The next stage was to put in a new length of coax with the outer at +5V and the short circuit at the cold end as a lump of copper, soldered in place. This raised the frequency of oscillation to 530MHz. Tinkering with grounding appeared to damage the circuit; the next move is to work out whether oscillator (181 quid) or divider (135 quid) is at fault. The odds are that a solder splash is shorting something, but the board is a pig to probe.
The 1.4GHz probe that Kevin was using in March has finally vanished; two replacement probes from Tektronix have been ordered, but will take three weeks to arrive. A 470R resistor should work nearly as well, but is less convenient.
The 200psec Blanking Board has been kitted, apart from its surface mount resistors and ceramic capacitors, which I am loading from Kevin Jackson's stocks - all the resistors are done, and about a third of the capacitors. Once this is done I will pass the board over to the technicians for them to load the conventional components.
I've thought a bit about the phase locked oscillator for the "Waveform Processor - Digital". The tank circuit looks to be no problem; I'll have to sort out the circuit that excites it.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A.W. Sloman
subject: Progress to 8th September 1989
Progress this week consisted of giving up on the 16G040 oscillator on the Trigger board; it seemed singularly unwilling to oscillate at 800MHz, and on Tuesday afternoon I admitted defeat, and spent Wednesday at the Microwave 89 exhibition, going from booth to booth asking about 800MHz oscillators.
This worked rather better than I had expected; Chronos Technology sold me a 700MHz to 1300MHz voltage controlled oscillator (VCO) off the stand (a Z-Comm C-700 for 80 quid), which I have now bodged onto the Trigger board in place of the 16G040 (187 quid) and its quarter wavelength stub.
The VCO is designed to run off 12V, so I had to add a 78L12 regulator to break down the 15V rail. The VCO generates 4.5V peak-to-peak into 50R through a blocking capacitor, so I had to provide a resistive divider to get the voltage levels right for GaAs, but the Trigger board now has a working 800MHz local oscillator, phase-locked to the 50MHz crystal oscillator.
Comparable VCOs, at comparable prices, are available from at least two other manufacturers.
My friend Dr.I.M.Green at EMI, prefers Z-Comm's D800 narrow band VCO - it has 20dB less phase noise than the C-700 and its equivalents - while John Bickley's friend Phil Durrant at MEDL (Marconi at Lincoln) recommends a VCO based on a SAW resonator; this would involve a 2,000 quid mask charge, since their nearest part is tuned for resonance at 811MHz, but I've asked him for a quote anyway.
A SAW resonator would probably give us the lowest phase noise and thus jitter for the sorts of delays we will usually be setting up; crystal oscillators usually offer lower phase noise only below about 800Hz, although there are some exceedingly up-market oscillators available at exceedingly up-market prices - the 3,000 quid job that the radio astronomers use for Very Long Baseline Interferometry is attractive - but I imagine that Dave will persuade me to settle for something less.
There has been no progress on any other front, but I should be able to leave the Trigger board with Bob Ward and Peter Milne next week and get on with the 200psec Blanking Board, the local oscillator for the "Waveform Processor - Digital" and the ME89 paper.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A. W. Sloman
subject: Progress to 15th September 1989
There doesn't seem to have been much progress this week; the Trigger board is not conversing sensibly with the Timebase Interface, and Bob is trying to work out why.
Yohannes would be trying to work out why as well, but his current contract with Cambridge Instruments doesn't mention the Delay board or the Timebase Interface, so he isn't being paid when he works on either - I have addressed a memo on the subject to Mike Penberth (copies to Dave Hall and Graeme Plows) but until the situation changes we can't reasonably expect much help from Yohannes.
Bob had to replace the transmission line transformer on the Trigger board; one output pin showed no signal at all, but the replacement transformer is working as designed. IC94 - one of the AMD Taxichip receivers - has also been replaced without noticeable effect. The Trigger board Taxichip receivers seem to be working worse than the Delay board Taxichip receivers, though this may be a case of cancelling errors.
The 800MHz output from the Trigger board to Delay Board A now gets through fine; the 100MHz Delay Clock it generates on the Delay Board is apparently clocking addresses into the ECL RAM, since we can read back different numbers from different RAM addresses, but the numbers are not what we wrote in originally, even allowing for the two bits which seem to get transposed between "Write" and "Read". Yohannes should be able to sort this out fairly fast when he can afford to spend some time on it.
In order to get the 800MHz through to Delay Board A we had to replace R206 on the Trigger Board, which had increased in resistance from its nominal 75R to something in excess of 2K, messing up the DC level at the input to IC38, the 800MHz line driver.
There hasn't been much progress with the 800MHz frequency source; MEDL have produced a half-baked quote of three to four thousand quid to develop one prototype, and Aspen have been on the phone talking about 12-week delivery.
The 200psec Blanking board has now been loaded with all its passive surface mount components, and is now waiting in Jim Rose's in-tray until the EBMF work ebbs enough to free up a technician. The semi-rigid coax links for that board and the next two have now been ordered.
I have spent two days going through the EBT paper for ITEC, trying to shorten it for ME89 (26th to 28th September). It still needs pruning, but I've found a few typo's which survived from my original version and put in a paragraph on Logic State Mapping which should put Advantest's nose out of joint.
I haven't done anything about the local oscillator for the "Waveform Processor - Digital" Taxichip link, except to order the core, former and the adjuster for the tank inductor. It doesn't seem urgent yet.
Paul Austin seems to have been having some success with the RAM Store; he and Peter seem to have started shifting images around with some panache.
I'll be on holiday in France from today until next Sunday; see you on Monday the 25th. I have an appointment with the dentist for 9.40am, but I expect to be around for most of the day…
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin
from: A,W.Sloman
subject: Progress to 29th September 1989
The biggest chunk of progress since my last report is Bob Ward's triumph over the Trigger board TaxiChip receivers; his board had been loaded with receivers from an early batch that wouldn't cascade, and the supplier (probably Axiom electronics) had failed to pass on AMD's recall notice.
I've returned 9 of the receivers to Axiom for replacement; the tenth from their batch is almost certainly the one I pulled out of the Trigger board a fortnight ago, and binned.
Bob is now wrestling with the TaxiChip transmitters; we can't yet reliably read back the multiplexed counter outputs to the VME bus - the system works for a bit then locks up, It should be possible to sort this out by reprogramming the relevant PAL but Bob has been through the loop of negotiating his way onto the ATE Unisite a couple of times now and still seems to be a couple of iterations off the solution.
Using the Taxichip receivers only, Bob has got most of the way through checking out the input functions of the Trigger Board; he can now write to all the DACs. We haven't yet seriously checked out the "Fast” and "High Voltage" Trigger and External Clock inputs - so far, nothing is visibly wrong.
The various input functions on the Trigger board could well be checked out and working early next week, at which point we will go over to checking out the Delay board; once that is working it will be relatively easy to check out the Trigger board output functions to complete the Timebase sub-system.
While it would be much easier to put off testing the Waveform Processor sub-system until the Timebase sub-system is working, it would in principle be faster to test both sub-systems in parallel.
Dave Hall has asked me to look into hiring the relevant gear. Provided that our second Sampling Crate power supply does turn up next week, it looks as though an HP8175 pattern generator from Livingstone Hire at 326 pounds per week could be used to exercise the board - the mimimum pulse widths are a little wide at 20nsec, and it is impossible to be absolutely sure that we could program our eight channels to get the right signals, but it would probably do the job.
Before we get round to this I've got to do the cut and link mods to the "Waveform Processor - Digital" and make up local oscillator for the TaxiChip link - the bits for the inductor came in while I was in France.
On a less urgent note, I've given Bob Ward a memo on the 800MHz local oscillator, with some discussion of the phase noise performance we need - it is unremarkable, and we probably wouldn't improve the performance of the system by buying anything better than the cheapest oscillators. Amongst the cheap oscillators the D-800 is 30dB quieter than anything else, but it is single-sourced. Avantech and Vari-L produce devices which would be interchangeable in our application, but they are noisier.
The time I spent on the ME89 paper was wasted - Dave quailed at reading an eight page version of the paper - but I did persuade him to change "optimised" into "near optimal" in his description of the signal processing in the version he submitted. Actually I think the signal processing will be just about perfect, when it finally works, but "near optimal" sounds more poncey.
I've persuaded Paul to document the state of the Image Store. What follows is almost what he wrote.
PROGRESS ON EBT RAM STORE (SHEEP PEN)
Memory cards
Both the 8-Plane and Dual-Port RAM cards seem to be working correctly. The only modification necessary so far has been a change to a PAL equation on the Dual-Port RAM card.
NB2 Interface card
The first PCB was made recently and is now working with modifications. Not all of the card's functions were tested on the original 'Lintech' speedwire board and a new facility has been discovered. This is to replay a nudged image via NB2 lane B and store this image via lane C, into an 8-Plane or Dual Port RAM card. This facility would be required for dynamic fault imaging (DFI).
Paul has added parallel termination resistors to all the signal lines which are connected to the board via ribbon cable. This is a precaution against problems we may encounter when using longer lengths of ribbon cable. A marked up print of the circuit diagram has been given to Phil Fick, and we should eventually get a new PC layout and a corrected circuit diagram master from PCA.
Waveform Interface card
Syscon have demonstrated a working Waveform Interface card operating in real time without the sampling crate. This was achieved by connecting the TAXI links into loop-back mode. The TaxiChips were modified such that the data length for the transmitter was the same as the receiver. Wormhole transfers were made for a complete frame store.
Paul has recently had some success in testing the simulation mode for this card. However, there is a design fault which relates to the on-board state machine. Syscon are currently working out a simple (hopefully) modification to fix the fault.
The next batch of boards
Seven 8-Plane RAM cards, two Dual-Port- RAM cards and three NB2 interface cards are now awaiting manufacture. This should be complete in one month! Syscon will provide us with updated artwork for the Waveform Interface card as soon as the card works with the sampling crate.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Richard Adams
from: A.W.Sloman
subject: Progress to 6th October 1989
This week Bob Ward has made a good deal more progress with the Trigger board; all four user inputs now seem to work. The high speed, low impedance Trigger Input worked first go, but the other three took some effort - both the Trigger and External Clock high impedance inputs were impaired by a layout error around the LM334 current sources at IC 4 and 22 (not Gary Askew's first drop-off) and Surtech had put in rather more 33R resistors than they should have, and put an SOT-23 diode where the circuit diagram called for an SOT-23 transistor.
The 32-bit Trigger counter is now working, and Peter Milne can read back its contents and use them. The 32-bit External Clock counter isn't working yet - it should work with a Delay board in place.
In the temporary absence of anybody to work on the Delay Board, Bob is now injecting signals into the Trigger Board to check out the output paths to the Blanking Board and the Waveform Processor; there have been no insuperable problems so far.
While the TaxiChip link to the Trigger board is now working, it does not yet seem to be entirely reliable. Peter Milne's program that reads the counters on the Trigger board has a test mode, which seems to pick up duff data every couple of hundred reads - this problem might arise in the TaxiChip link or in the system that reads out the contents of the counters to the link. If the problem also appears when reading from the Delay board, we will look at the TaxiChip link first.
Peter Milne has written an AutoTrigger procedure to set up the Trigger board trigger and external clock thresholds; the first version clearly worked, but the "debugged version" has a minor bug and falls over for moderately small trigger inputs (below 300mV peak to peak).
Nothing is happening with the Delay board at the moment - Andrew Dean is shovelling his way through the board specification, examining the circuit diagram and reading Yohannes' part B specification. He doesn't expect to be game to start probing the board before the middle of next week.
We have up to a week's worth of intermittent access to Yohannes over the next few weeks, and getting that much left Dave somewhat war-weary - Yohannes is the critical path for the S.400 according on the current version of the project schedule. Perhaps we should hack into the SuperProject package and readjust the management universe...
Meanwhile, the HP8175 signal generator has been ordered and will arrive on Monday. I've got the 7.5MHz local oscillator half built - I'll probably need to rewind the transformer once or twice more - and it is conceivable that I might start exercising the Waveform Processor by the end of the week. But not too likely.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Richard Adams
from: A.W.Sloman
subject: Progress to 13th October 1989
This week we have done some work on the output side of the Trigger Board around IC58, which controls the width of the unblank pulse in the range 20nsec to 20usec. We didn't pay enough attention to the layout around this device, and its performance was diabolical, spectacularly so for short pulse lengths.
The original intention had been to cover the range of pulse widths in twelve overlapping ranges, by selecting one of four resistors and one of three capacitors; in the short term we will have to settle for one capacitor soldered across pins 7 and 8 of IC58. A 220pF capacitor would give us pulse widths in the range 20nsec to l.8usec, which should be enough for the prototype. If we tinkered with the Offset Adjust input we could probably set up the circuit to cover a wider range.
Even with a single capacitor the output pulse widths are a little erratic (+/-1% from pulse to pulse). This may be reduced by improved decoupling around the circuit.
All these problems should be easily cured by a localised revision of the circuit layout. We haven't yet looked at the 2.4nsec to 20nsec pulse width generator; this was laid out very carefully, and should be okay.
Peter Milne and I have spent some time playing with the Fast Trigger Input and Peter's Autotrigger program; the program worked first time, and hasn't needed the tinkering it has had since - it falls over for trigger inputs less than 200mV peak-to-peak, because the Fast Trigger Input has a self-heating problem in the input transistors, which can shift the effective threshold voltage by +/-100mV over a second or two after a change in the threshold DAC output. Since the Fast Trigger Input won't trigger at all on signals below 60mV peak-to-peak, this seems acceptable.
In the process we found a drop-off on the circuit design which gave us 40mA tail current in Fast Trigger/External Clock input, rather than the non-destructive design figure of 20mA. This has now been corrected.
The 200psec Blanking Board has been loaded with everything bar the GaAs parts and the SMA sockets; I'll finish it off when I find a suitable gap in the project plan - probably next February ...
Andrew Dean has been immersing himself in the Delay Board; he has made a tentative booking to lay a scope probe on a powered-up Delay board next Tuesday.
He has been warned that the TaxiChip transmitters are the points of immediate concern.
I've made very little progress with the "Waveform Processor Digital". The local oscillator now oscillates at around 5.2MHz - I've got to rewind the transformer with 20+7 turns rather than 30+10, which should give us the 7.5MHz we need. The varactor gives me roughly +/-200kHz around 5.2MHz, and the adjuster in the transformer core gives me +/-400KHz, which seem sufficient margins for temperature drifts and component tolerances respectively.
I've still got to put on the phase detector and amplifier to complete the phase-locked-loop. I had hoped to use the AD-9901 phase detector, but we don't seem to have any spare from the Trigger board; I've asked Ken Lincoln to order some, but I haven't yet found out when they will arrive.
The HP-8175A digital signal generator arrived on Monday, and has done nothing all week - but nobody else has hired it, so it will be available next week, too.
Peter Milne and I have both applied for Dave's job, now that he has bailed out; neither application suggested that the applicant could work miracles, so we probably won't get the job.
Peter and Paul and I have hatched a plot to reduce the EBT2 screen resolution to 512 by 512 (from 768 by 512) to allow us to replace the LIP with any of the wide range of Image Processors available with this resolution. This would also make the image format compatible with the Q.570, and save us from having to wait for the S.300 image store.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Richard Adams
from: A.W.Sloman
subject: Progress to 20th October 1989
Bob Ward has been heavily involved in getting the S.260 circuits out, but he has done some more work on the Trigger board - the 2nsec to 20nsec blanking pulse width control appears to be duff despite the care taken with its layout; the nature and extent of the problem is as yet uncertain and it is possible that it may go away on more careful inspection.
The circuit which strobes the A/D converter repeatedly during long unblank pulses now seems to be working; Bob found that a test via was mysteriously loading one of the logic outputs (the artwork doesn't show it connected to anything) and cutting the relevant track cured that problem.
None of the outputs to the Waveform Processor board have been tested yet, but this represents a relatively small part of the Trigger board - Bob is within a week or so of covering the whole board, though it may take a little longer to bodge it into a useable state. Since Bob is on holiday next week, this is two weeks of real time. I'd have liked to put in some time on the board next week, in Bob's absence, but the Waveform Processor has first priority.
Andrew Dean has now probed the Delay Board and gone on to add a piggy-back PAL, and discover that certain of the ECL flat-packs are not soldered down at every lead - Surtech strikes again.
More important, he has found out that AMD no longer recommends linking Taxichip transmitters together to handle words longer than 8-bits; receivers can be "cascaded" without problems, but not transmitters. We should be able to set up a single Taxichip transmitter to drive cascaded receivers - AMD have a recommended circuit and Andrew has a copy coming in the post - but it will required substantial albeit localised mods on the Trigger, Delay and Timebase Interface boards. The modified transmitter circuit is unlikely to take up more board space than the original circuit, and will probably be cheaper.
The "Waveform Processor - Digital" and the Waveform Interface boards are not affected, as their TaxiChips are not cascaded.
I've made a bit more progress on the "Waveform Processor Digital". The local oscillator now oscillates at 7.5MHz, and I've drawn a circuit for the phase-sensitive detector and output filter to drive the varactor diode to lock the local oscillator to the average of the Taxichip receiver output.
I've even got all the integrated circuits out of store (the AD-9901KQs arrived this morning); I'll probably get the circuit assembled on Monday.
Neither Peter nor I nor Clive Rudd (foreman of EBMF final test, and probably not clever enough to do the job well, though well-qualified in every other respect) got Dave's job; it will be advertised again in spring (and I was told that I could re-apply - I imagine that Peter and Clive got the same message). In the meantime Richard Adams will be acting as Project Manager for us as well as Image Analysis - he tells me that he has had next week booked as holiday for a long time; it isn't compassionate leave to allow him to say a temporary farewell to wife and family.
Paul Austin is beginning to fix his sights on the Matrox image processor; he may go down to look at it with Paul Buggs, Peter Fraser, Geoff Jenkinson and John Jarvis next week. For the newcomers - Paul Buggs and Peter Fraser are part of Richard Adam's Image Analysis team, and Geoff Jenkinson and John Jarvis are associates.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Richard Adams
from: A.W.Sloman
subject: Progress to 3rd November 1989
The local oscillator for the "Waveform Processor Digital" is now working and ostensibly jitter-free; the original drive arrangements for my "high Q" oscillator meant that it got slugged to a very low Q state every 133nsec, and worked as a relaxation oscillator, with a period that depended pretty directly on supply voltage. An extra diode and resistor seem to improve matters quite a lot (at least one hundred-fold), and I can hope that it will work on the "Waveform Processor - Digital" board.
For the last couple of days I have been doing the cuts and links on the "Waveform Processor - Digital" that are necessary to correct the known faults in the board. This is almost finished; there are two more links to make.
There is probably another day's work in putting heat-sinks on the board, and the TaxiChip transformers, and bodging the local oscillator daughter board into place. At this point we can plug the "Waveform Processor - Digital" into the second Sampling Crate, and let John Harrison start writing to the board.
He may even be able to do some reading back.
We won't be able to seriously exercise the board until we can feed in the various clock pulses - Encode, Memory, Write, Sampling List Completed and Processing Pass Completed. Complete testing also needs Latch, Squelch and Convert pulses, and some means of duplicating the Processing Pass Incremented handshake.
This means wiring up a dummy Trigger Board to plug into the Sampling Crate at one end, and the HP-B175A digital signal generator at the other, which will take a couple of days at least.
Andrew Dean has had another productive week on the Delay board. So far he has replaced three 10G000A-4C quad three-input NOR gates, at £30.78 each (there are 52 in Stores) and one 100131 ECL D-type, and is now getting strings of sampling pulses.
This allows him to test the time-to-digital converter, which isn't likely to work until he replaces the BFR-96 transistors right way round (I thought I'd checked that bit of the layout, which is where the error is).
There is still plenty of Delay board left to cover, including some rather hairy bits, but Andrew is definitely munching his way through.
Bob Ward expects to get back on the Trigger Board more or less full-time on Monday - he found an open circuit track on the board on Wednesday (artwork error) but he hasn't really been able to put in much time this week.
Paul Austin has not made any progress on the RAM Store boards; he has been fully occupied by the demonstration and the Image Processor trawl. It seems that the Imaging Technology and Matrox Image Processors are the front runners, with Analogic and Datacube still in consideration. There seems to be a persistent illusion that the new Image Processor will need a slow scan interface because the LIP has a slow scan interface; the new Burst Mode Imaging system is a slow scan interface - it won't work with TV rate scans and there is no necessity for a separate slow scan interface on the Image Processor (although one can concoct situations where it could be useful).
I have had an interesting discussion with Trevor Sexton on the design and control of diesel-powered pogo sticks - they need phase-locked loop control of the bounce rate to allow travellers to synchronise oscillation for conversation on the bounce, and this could be adapted to provide a politicians model with 180 degrees of phase shift for automated hand-shaking (one hesitates to think what a motorised Cecil Parkinson might do – Cecil Parkinson was a particularly libidinous Tory politician in the news at the time). This is of no immediate relevance to electron beam testing, but will no doubt eventually acquire serendipitous significance.
Simon has used the column to segment another specimen; Chris Warner has been appraised of the need to devise a multi-dimensional look-up table to allow us to generate working distance data from C3 current, beam voltage and extraction voltage. He seemed to find this more relevant than the diesel-powered pogo-stick.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Richard Adams
from: A. W.Sloman
subject: Progress to 10th November 1989
The "Waveform Processor - Digital” is now ready to plug into the Sampling Crate. Putting the last of the links on took a little longer than I had expected; I'd missed a few on the first pass through the circuit diagram.
After I had finished the links and put on the heat-sinks I managed to notice that Surtech had put the TaxiChips in wrong, with the transmitters where the receivers ought to be and vice versa. Getting the chips out of the board and cleaning up the plated-through holes took a large chunk out of a day.
It is possible that this process turned the l00nF capacitor at DC4 into a 2.4R resistor - finding it and removing it took up most of this morning.
I got away from the board for long enough earlier in the week to get Dave and Richard and Graham to agree that we should pay TDS 600 pounds to do a "Design Study" on the Accumulation Store in the Waveform Processor. At present the store consists of eight ECL RAMs in 24-pin DIPs, interleaved for extra speed, but we are replacing them with PLCC packaged ECL RAM from Cypress/Aspen which happens to be faster as well as more compact.
The extra speed might let us get away without having to interleave two banks of RAM, thereby saving four RAMs, two latches, and loads of tracks - TDS designed that bit of the board in the first place, so they are well placed to work out whether the new RAM is fast enough.
Next week's job is to wire up a dummy Trigger board to couple the HP-8175 digital signal generator into the Sampling Crate.
Andrew Dean has had an interesting week on the Delay Board - last thing last Friday we decided that I had left out a level shifting stage in the time-to-digital circuit I gave to Yohannes, and on Tuesday we decided that I had got three resistor values wrong in the digital-to-time converter.
The level shifting should probably be done with a PNP long-tailed pair, but for the moment Andrew has settled for a resistive level shifter, with speed-up capacitors. Two of the three duff resistors have been replaced, and the third one is unlikely to present problems.
Andrew is now trying to get the time-to-digital converter working sensibly - it is doing something at the moment, but we are not quite sure what.
Bob Ward has got the Processing Pulse Generator working on his Trigger board, albeit with some difficulty - the Metheus simulation of the 74163 synchronous counters doesn't simulate the behavior of the "carry" output correctly, which meant that the real circuit had to be modified before it would work.
Next week it is the Memory/Latch/Squelch output generator, then we can start worrying about the quality of the Unblank Pulses (the quantity is fine).
Today I chased Purchasing about the 800MHz VCOs I had thought that they had ordered for the Trigger board a month ago. They expect to order them shortly.
Paul Austin has now sorted out the last of RAM Store boards - he is short one set of 8-Plane Memory PALs and one set of Dual Port Memory daughter board PALs, but that shouldn't last beyond his next access to the Unisite PAL Progammer.
I have had no interesting discussions with Trevor Sexton.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet,Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Richard Adams
from: A.W.Sloman
subject: Progress to 17th November 1989
The "Waveform Processor - Digital" has been plugged into the Sampling Crate. Initially I only had two BNC-to-SMB cables to link it up to the Waveform Interface, and used them to link in the low byte Taxichip receiver on the Waveform Processor.
After putting a link onto the board (and onto the parts list) and linking two pins that had unaccountably failed to get tracked on the PC, I was able to see that the Local Oscillator was working as intended.
While production made up the extra six BNC-to-SMB cables, I put the local oscillator circuit into the "Waveform Processor - Digital" circuit diagrams on Metheus, and added the new parts onto my parts list for the board.
With the full set of cables it has been possible to see that both pairs of Taxichip receivers are not generating Violation outputs; attempts to write to the board have showed that the high and low order bytes of the address were swapped at the Taxichip receiver output on the Waveform Processor board.
A first look suggested that the bytes had been swapped between the Taxichip receivers and at least one set of PALs - buzzing out the board showed that the tracking is okay (at least for the low order bit).
John then swapped the bytes in software, and I found that what was 00 on the VME bus came over as 80 on the TaxiChip link; I don't understand the Waveform Interface board well enough to be able to work out whether the Taxichip transmitter is being asked to transmit 00 or 80, so I've passed the problem over to Paul for the moment.
Dave Hall has asked me to document the changes to the ECL RAM chips on the circuit diagram and the parts list; I don't expect to do this until the end of next week, after Bob Anderson has completed his investigation at TDS - he got the order in this morning's mail, and will start work immediately.
Andrew Dean has gotten serious about the Delay board; he tried to start using the Tektronix 7T11 sampling plug-in on Wednesday, and has decided that the external trigger input isn't working. He is probably right – the Tektronix trigger input incorporates a tunnel diode.
Yesterday he got to work on the Iwatsu SAS-8130A Waveform Analyser, and is now getting some use out of it - it has the same band-width as the old Tektronix gear, but a more modern control panel which is even less comprehensible.
None of this has much improved our understanding of the action of the time-to-digital converter, but Andrew seems to be getting a clearer idea of what is going on. Today he replaced the conventional surface mount capacitors in the level shifter with our expensive UHF decouplers, and which gave him a lot more voltage swing.
Bob Ward hasn't got as far with the Memory/Latch/Squelch output generator as we had hoped - the AD-9500 pulse generator in the input stage of this circuit has not been working properly. After a lot of investigation, it is beginning to look as if one of the crucial tracks has a relatively high impedance short to an unknown ECL output.
Paul Austin spent the beginning of the week translating the RAM Store PAL files from JEDEC to ABEL, as required for production.
He has spent some time wrestling with the Waveform Interface board; the software simulation of movie mode isn't working, and now I've lumbered him with the VME mode as well.
Today's high priority job is listing the cut and link mods required to fix the current version of the Naffbus 2 Interface board; PCA have the circuit changes, but the revised artwork won't be available until February, so Paul has to provide production with the information required to let them do the cut and link mods on the first four boards.
to: Dave Hall, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin,, John Harrison, Roland Meins, Andrew Dean, Chris Warner,
Paul Buggs, Richard Adams
from: A. W. Sloman
subject: Progress to 24th November 1989
The "Waveform Processor - Digital” is now in Paul Buggs capable hands - the hands are shaking a bit as Paul begins to realise what he has let himself in for, but they haven't started trembling uncontrollably yet. This probably means that Paul hasn't completely understood the full implications of the specification.
Progress on the "Waveform Processor - Digital" has been limited to finding out that the Taxichip receivers on the board are connected to the wrong cables - which is why high and low bytes were interchanged - and that the Address/Data and Read/Write bits are being taken from the wrong receivers (which is why it took a day or so for me to realise that the receivers were swapped).
Paul has done a cut and link swap between the Read/write and Address/Data lines; which left him in a position to discover that all the PALs had had the ATE test inputs programmed for the wrong polarity - the PALs have now been reprogrammed and recognise addresses.
Once the PALs start generating read and write enables we will be able to start bug-hunting the periphery of the board - already Paul has noticed that the connections to the latch intended to hold "command" bits have been so designed as to not pick them up when they are transmitted, and to lose them on the next data transmission. There may be more like that.
The process of correcting the layout of the "Waveform Processor - Digital" cannot be completed until all such drop-offs have been found and corrected on the circuit diagram. "Waveform Processor - Digital" boards built with a corrected layout are most unlikely to be available before week 44, and could well be delayed some weeks after that, if it takes us a long time to get the various bits of the Waveform Processor to a state where we can see them working.
There is enough to be done on the "Waveform Processor Digital" that we intend to start getting the layout corrected before 5th December.
The Metheus circuit diagrams for the board are almost entirely up-to-date. As soon as Bob Anderson tells me the conclusions of his design study on the faster memory we will update the circuit diagrams; today's promise from TDS is first thing Tuesday morning (if they had met their quote they would have finished the job today - in fact they are just starting it).
I still have to finish up-dating the parts list, and I want to prepare a list of corrections and changes, which will take a couple of days.
Bob Ward has had a reasonably good week on the Trigger board; all of the Encode, Memory, Latch, Write and Squelch outputs are present and working and the numbers of Encode and Latch pulses can be programmed; the timing doesn't seem to be quite right yet and Bob wants to do a bit more testing, but the system is very nearly there.
Next week we dig into the Unblank Pulses, and then that board should be as good as it is going to get.
Bob expects to be testing the board for the next week and a half; after which he will need half a week to document the changes required on the Trigger board in sufficient detail for G S Designs to start work on the layout, which brings us to the Monday of the 11th December (beginning of week 37).
Bob expects to use that week to up-date the Trigger Board circuit diagrams to reflect these changes, so that by week 38 he can give G S Designs up-to-date circuit diagrams against which they can check the new layout.
The artworks could then go to Printech in week 40, which could give us boards by the end of week 42, which means that we might get loaded boards back from Surtech early in week 44. G S Designs could well take longer over the layout, and Surtech will probably take longer to load the board, so that week 44 is very much the earliest possible date to get the next Trigger board.
Andrew Dean has made considerable progress with the Delay board; the Iwatsu scope has revealed that a number of the GaAs signals do not have monotonic rising or falling edges, while other are merely painfully slow.
Part of the problem is that GaAs slows down a lot if the fanout is too high, or if you over-do the wired-OR, (which is a problem that can be solved by throwing in more GaAs logic) and part is that vias and transmission lines don't mix, and while I told Rodger Snook (one of the Cambridge printed circuit layout draughts-people – perhaps the best of them) about vias, I didn't dig my heels in hard enough about getting rid of them.
The prospects for getting around this on the present hoard are not too good, and the degree of difficulty in getting rid of vias on a new layout should not be under-estimated we may need to go up to an eight-layer board to get a buried layer of strip-line connections.
What follows is a heavily edited version of the rest of his report on the situation.
Estimate of future progress from today:
Two weeks to have the card completely working with the following provisos:
1. the vernier delays (0 to 1.25nsec) will not necessarily be monotonic and therefore the software may not be able to calibrate the card automatically.
2. the functions involving two Delay cards will not have been tested at all.
Page 3
1 week to design the changes that will be required on the next issue (as opposed to the mods that have been done to bodge this first issue into operation.
1 week to update the circuit diagram - this may be done by the circuit design group.
2 weeks for Artwork adjustments
0.5 week to update documentation
1 week to ensure that the layout is optimised to maintain the cleanest possible edges on the critical signal paths.
3.5 weeks for photography, board manufacture and assembly.
1 week to bring the 2nd Delay card up to the same standard as the first
2 days to inspect each new pcb
1 week to test each version 2 Delay card when assembled.
In terms of elapsed time, based on the estimates above:
|
|
Week |
Activity |
|
Nov Nov Dec |
33 34 35 |
Debug of issue 1 & II |
|
Dec |
36 |
Circuit Design |
|
Dec |
37 |
Circuit Diagram Update |
|
Dec |
37 |
Update Documentation |
|
Dec |
38 39 |
Artwork Modify and Check. Modify Delay boards Christmas |
|
Jan |
40
|
Photography. Test system with two issue 1 Delay boards
|
|
Jan Jan Jan Jan |
41 41 42 43 |
pcb Manufacture. Test system with two issue 1 Delay boards “ “ pcb Assembly “ |
|
Feb |
44 |
pcb Inspection |
|
Feb Feb Feb |
44 45 46 |
pcb Test + incorporate latest mods “ |
Paul Austin has sorted out the problem on the Waveform Interface board that was messing up the "Waveform Processor - Digital": Syscom designed for byte-based addresses, whereas we are using word-based addresses, so Paul replaced two 574 latches with PALs, which saved moving 16 address lines.
The rest of his week has been getting PALs documented for production, and poking around other aspects of the Waveform Interface board - one of those weeks of progress between milestones.
(Note added 30-07-2017 : As is revealed in the first weekly report for 1990 - 12th January written after I'd got back from month's holiday in Australia – one of the problems with the issue 1 Delay Boards was that the inner layers of the board hadn't been stacked in the right order, so that a lot of traces that had been laid out as constant impedance strip-line over a solid power plane, and terminated with resistors matching that impedance were at least one layer away from the solid power plane, changing the characteristic impedance.
I remember looking at Andrew Dean's stapled-together stack of layer artworks, and saying that I thought that he'd got them in the wrong order – after I'd gone off to Australia he checked and found that he'd got them in the order used to build the board, which was not the order specified in the layout notes we'd given to the Printed Circuit Artwork section.)
to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs
from: A.W.Sloman
subject: Progress to 1st December 1989
While Paul Buggs has been away on holiday, progress on the "Waveform Processor - Digital" has been confined to TDS, where Bob Anderson has worked out how we can modify the Waveform Processor to use four less RAM chips and two less latches; this involves changing the Feedback Latch (IC33,34,35 from 100151 clocked latches to 100150 transparent latches) and driving it from the buffered Write line, rather than nWrite. The Trigger board has to generate a narrower Write pulse, slightly before the Memory Edge, rather than 20nsec after, but Bob Ward thinks that this is manageable.
In the course of his investigations Bob Anderson found what appears to be a fault in the Squelch-stretching circuit at IC37, and has devised a solution which ought to work.
I'm up-dating our circuit diagrams for the Waveform Processor (as aOaVl.sch and aObVl.sch on Metheus), and should be able to up-date the Waveform and Trigger specifications to cover the change to the Write pulse before Tuesday.
Bob Ward has now gone through the entire Trigger board. His report - lightly edited - follows.
The testing of the Fast Trigger Board (854696) has been SUCCESSFULLY COMPLETED and now awaits full system test.
The bulk of the test time was spent tracing faults due to assembly errors caused entirely by the nature of SMT (and lack of care by the assembler). It should be noted that not only did this cost the company money in this instance but is likely to be an on-going problem!
The problems caused by duff TAXI chips are now legendary, but again took significant time to find.
I am pleased to say that ONLY TWO DESIGN ERRORS occurred, these being easily fixed by cut and hack. These should be considered with respect to the size of the design (5 sheets), the short timescale demanded, and the number of specification changes and revisions (13+)!!!!!!
There are a number of investigations going on, aimed at maximising the performance by improvements which can only be achieved by a re-layout of critical areas. The improvements are to be incorporated into the revised production level artwork and are being detailed at the moment.
System test may also reveal problems, and it would be desirable to system test the board before proceeding. However I realise the tight timescales to which we are working, but must take this opportunity to point out the possible pitfalls.
I also confirm that I will be available to pose for photographs for New Electronics magazine relating to this achievement.
This completes Bob's report - I can add that Bob and Gary Askew have laid out the very fast sections of the Trigger Board rather better than Rodger Snook and I managed with the Delay Board.
Andrew Dean has found that the current source transistor on the Digital-to-Time Converter has been acting as a 2GHz oscillator. Taking out my base-protection diode and tidying up the layout (me and Rodger Snook) stopped it.
The fact that Andrew is now examining the Digital-to-Time Converter follows from him being reasonably satisfied with the Time-to-Digital Converter. I haven't seen the results of any digitisations yet, but until we got rid of our 2GHz oscillator the results didn't mean much anyway.
Now they are good enough to reveal my oversight on the wiring up of the adders that drive the Digital-to-Time Converter, which Andrew has now fixed.
Last week's pessimism about the chances of getting the first issue Delay boards to work at all seems to have been excessive - the board is now working, albeit badly, and will probably be improved once all the gains and offsets have been set up. Andrew is deeply suspicious of the positioning of some of the latching edges, so it will probably take more than programming the DACs correctly to finish the job.
Trevor Sexton has been banished to the outer darkness, out of rubber band range of his acquaintances. It is difficult to equate the marketing area to Hell or Purgatory - the air-conditioning doesn't quite manage the sulphureous stink or the extremes of temperature traditionally associated with these regions, although there does seem to be an adequate supply of damned souls and demonaic tormentors - but Trevor seems willing to see it in this light.
Chris Warner's new mission, should he choose to accept it, is to devise an Ethernet compatible remote rubber-band launcher, so that Trevor can maintain his social interactions within Engineering from the remote fastnesses of Marketing, or granting a decent e-mail link, from customer sites around the world.
Peter and John and I could have exploited this sort of technology to remain in contact from the southern hemisphere, and Dave could have been another participant in the world's first networked system for pratting about - this offers one of the few real opportunities Britain has had to lead the world (have you ever heard of the Japanese pratting about?).
(Note added 26-07-2017. I went off on holiday to Australia at this point, and didn't get back to work until 8th January 1990.)