to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin,, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from : A.W.Sloman

Subject: Progress to 12th January 1990

While I've been away on holiday, Paul Buggs has been wrestling with the "Waveform Processor - Digital". He can now read and write to all the TTL bits of the board, and he is making progress on reading the Output Store and writing the Expected Waveform Store. We may be able to start using the HP-8175 by the end of next week.

The process of getting the Taxichip link working has involved re-programming the relevant PALs about ten times so far, which tends to confirm my opinion of Dave Cox. I don't believe TDS ever did much work on simulating the data link, mainly because the Taxichips were a bit of a mystery, but it looks as if even the most simple-minded simulation would have picked up a lot of the errors.

There were also three duff ACT244 buffers (probably victims of static) and a TaxiChip transmitter that died (probably due to trying to drive a duff cable), but the PALs sound like the bulk of the problem.

Meanwhile GS Designs have re-laid the "Waveform Processor Digital" with the phase-locked-loop and the faster surface-mount memory chips, and Bob Moore sounds pretty happy with the result; I'll talk to him about it on Tuesday, and get the silk screen layout (Bob offered me pen plots of the tracking, but it doesn't seem worth working through that until Paul has proved the rest of the circuit).

Andrew Dean seems to have the Delay board pretty much under control - in one sense it is a relief to find out that the PCB was made with the inner power planes in the wrong places, since it explains why the edge speeds are grotty, although from every other point, of view it is excruciatingly embarassing (Kevin Purton and I are blaming Rodger Snook, since he has left and can't defend himself, and it could well have been his fault, but it still represents a massive failure of communication).

(Note added 27-07-2017: In reality what had happened was that somebody at Printech had looked at the board and decided that the copper distribution between the layers might make it warp, and proposed to swap them around to minimise the risk, and whoever he'd called in the Cambridge Instruments Printed Circuit Artwork section hadn't known enough about the board to realise that for this particular board the layer order was important – for typical boards it usually wasn't.

In this particular case, quite a few traces had been laid out as constant impedance transmission lines above an adjacent ground or power plane, and terminated with a resistor equal to the characteristic impedance of the transmission line – moving the plane further away changed the impedance.)

I haven't had enough time to think about Andrew's revisions to the Delay board to comment on them with any confidence, but they look pretty good so far.

Bob Ward has done some more work on the Trigger board, and it looks as if some of the jitter on the pulse widths came from noise on the +5V rail, which we can cure; Gary Askew at GS Designs isn't yet so far forward with relaying the Trigger board that we can't ask him to add another three-terminal regulator.

Steven Fisher has had a working link to the Plinth Control card for most of today, and has now been right through the write addresses, finding and curing several small problems. We are still planning to modify one of the old Timebase Interface boards so that he can read what the Plinth Control card sends back - I delayed this a bit by hiding both the cards on the top of my desk while I was in Australia, but it should happen fairly soon.

Paul Austin seems to have spent the last five weeks doing something on almost every card in the machine - a regular peripatetic engineer. I don't think my jet lag has abated enough for me to do justice to all that he has done.

Trevor Sexton and I have spent a few hours on the old 800psec Blanking Board from the 1984 Thompson-CSF Voltage Contrast system; it now seems to be working, with a new PROM and two new 100K ECL chips. Dave Leary did some work on the board towards the end of last year, and he thought that he had got it working. Maybe we ought to exorcise the board.

Chris Warner probably doesn't have the theological expertise required to devise an automatic board exorciser, and since I regularly take the name of the Lord in vain, I doubt that I would be better placed. Maybe we could invoke Tim Frost - although his Christianity is probably too primitive to be compatible with an automatic exorciser.

(Note added 11-10-2012: Tim Frost worked with me at Cambridge Instruments on the 1984 Thompson-CSF Voltage Contrast system and moved – with Ralph Knowles – to Lintech a year or so later. He didn’t get hired by Cambridge Instruments after Lintech went bust, but quite a few people on the distribution list knew him.)

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet

Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin

John Harrison, Roland Meins, Andrew Dean

Chris Warner, Paul Buggs

f rom: A.W.Sloman

subject: Progress to 19th January 1990

Kevan Purton gave me the 200psec Blanking Board drawings to sign off on Wednesday morning - I found 19 points I wanted corrected and gave them back, unsigned, last night. Two of the points reflect things we will have to change on the PCB - I'm going to try to get to get the last of the components onto the board next week, and I may be able to get in some testing before Kevan gives me back the corrected drawings.

Paul Buggs has had another happy week wrestling with the "Waveform Processor - Digital" and after another half-dozen PAL changes, and twenty-odd cut and link mods (Bob Moore appears to have thought that Vdd=+5V and Vee=0V, whereas we meant 0V and -5.2V . ..) he has got as far as he can without using the HP-8175 to get the ECL side of the board going. That is, he has written to the Expected Waveform Store, and read from the Output Store - we won't be able to tell if what he has written has gotten into the Expected Waveform Store until we can persuade the ECL side of the board to move it round to the Output Store. This is definite progress. Paul may now be qualified to have his photograph published, slightly out of focus, on the inside pages of New Electronics or the like.

Actually getting the HP-8175 to move the data round may take some time.

Yesterday I went down to GS Designs with Bob Ward, and I got to look at the re-laid "Waveform Processor - Digital". Bob Moore drew my attention to certain minor omissions from the data I'd given him, and I gave him a few more corrections to be put in. Bob Moore was able to get the extra stuff in by moving the old components around as big lumps, so there wasn't much ripping up and starting over. This is reflected in his relatively modest bill (so far) and ought to make the new board relatively easy to de-bug.

Unfortunately, the new ECL RAMs which the new layout is to accommodate have not arrived yet. Since they were due a month ago, I am not at all happy, and I'm now waiting for Ambar-Cascom to tell me what is going on. Any Ambar-Cascom rep appearing on scene in engineering should be held for interrogation - we may need to borrow Knobby Parson's Megger to get reliable skin resistances.

Andy Dean has got most of Burst mode working on the Delay board, and is optimistic about moving onto the other Delay board early next week, which implies a possibility of having two "working" Delay boards early the following week, I would guess that this means that there is roughly an even chance of having two working boards by the end of the following week, but I wouldn't put money on it.

Kevan Purton is planning on slowing this down a bit by giving Andy pen plots for selected areas of the revised Delay board early next week; I want to spend some time looking at these with Andy, both to satisfy my curiosity and to provide an element of double checking.

Bob Ward checked over the last of Gary Askew's revisions to the Trigger board yesterday, and I got to look over his shoulder at a couple of the critical bits; Gary expects to be plotting out the artwork early next week. Bob Ward has an almost completely up-dated parts list for the board - he won't be able to add grid references for the last of the parts until Gary finishes off the last bits of tinkering with the layout - which we should be able to finalise on Monday, after which we can check it against the circuit diagram and get it onto System 38 in time to go out to Surtech with the relevant bits of the revised artwork.

The Plinth Control card is considerably further forward this week; Steven Fisher has been using the current Timebase Interface card (somewhat bodged) to read back from the Plinth Control as well as writing to it, and the board is now on the plinth, extending its tentacles into the mechanics. Simon figures that it will take at least a fortnight to get all the various functions working - longer if we run into serious bugs - but odd chunks are working already (like Column Z, stage limits and some EHT control outputs) and the bugs have so far been trivial and tedious, rather than big and exciting.

The 16-bit PMT control DAC is working; we are using the S360's £120 DAC9331-16 on the grounds that it is going to be replaced by the SP9316C-4 at £30 real soon now. Mike Penberth last week introduced the Analog Devices AD-7846AD (127439) at £17 (he expects to use it in reasonable volume) so it is probably going to be worth trying to change over when we correct the Plinth Control board artwork.

Yohannes has got the Timebase Interface circuit diagrams up-to-date; we could issue them to PCA today.

Yohannes wants to do a bit of simulation to check out the PAL programs, which probably won't be through much before the end of next week; it is quite possible that the simulations will throw up problems that may require minor retracking of the PAL inputs and outputs, and it might be considerate to hold back the circuit diagrams until Yohannes has gotten through the simulations.

Paul Austin started the week on an interesting note - on Monday he and his wife exchanged contracts on a house in Searle Street (they move in next Thursday). Since then it has been downhill - he has spent most of his time on Metheus, up-dating the Ion Pump Monitor circuit diagram. He has put in some time on his report on bought-in replacements for the LIP, and he did enough work on Syscon to get the promise of a quote today for some mods on the Waveform Interface board; not having a working crystal ball he can't get a quote for all the mods we are going to want on the Waveform Interface to get the Burst Mode link working to the "Waveform Processor - Digital".

Chris Warner isn't working on a crystal ball, despite the customer interest - for the last week he seems to have been concentrating on the Perspex balls-up, otherwise known as the through-the-lens-detector (TTLD). I've talked to him about high voltage connectors and reliable vacuum feed-throughs, but I suspect that there isn't really enough space at the TTLD for anything but fairly desperate bodging.

I gave Bob Taylor some faxes I got in today from Zygo on their compact laser interferometer system - the interferometer blocks and detectors are only 19mm high, which may help.

Trevor Sexton and I have discussed the application of Meggers to interrogating semiconductor sales reps; he thinks that he has a spare Alpha Repeater EHT set which should have enough output voltage to drive a measurable current through the extraordinarily thick skin of the typical rep. Variations in skin resistance don't tell you much about the reliability of the story you are being told, but if you set the current high enough you can work the process in reverse.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 26th January 1990

I've spent most of this week on the 200psec Blanking Board; Kevan is holding back on making corrections to the circuit diagram until I've got the board working.

The process of getting the board working has taken longer than I had hoped - I had to spend most of Wednesday finding and fixing dry joints between the surface mount components and the board - I haven't been doing any better than Surtech at getting all the contacts wetted on the first try.

Yesterday I powered up the board, and found that Rodger Snook had put on all three BAS-16 diodes the wrong way round, which I could correct by rotating the diodes 120 degrees clockwise. One of the daughter board connections is duff - socket 29 should be hooked up to the +15V rail and isn't, but that is easily fixed.

Further progress depends on getting another TaxiChip isolating transformer from Nobby Parsons, which would normally take no time at all, but he has had a succession of other feckless clients, and a couple of hours has stretched to a couple of days.

Even without the transformer we've found an error in the decoder PAL Paul Austin programmed for me; I put the DAC at address 8401, which the VME system won't generate, so Andrew Dean and I have programmed a new PAL which puts the DAC at 8402.

Paul Buggs has had a relatively relaxing week making up an interface board to translate the TTL outputs from the HP-8175 Digital Signal Generator into the ECL levels we want (the HP-8175A can generate ECL-level signals, with an ECL output pod, but we only seem to have TTL output pods despite the claims of the Livingstone Hire catalogue). Putting a couple of 100124 TTL-ECL translators onto the interface board hasn't complicated life much, but although it does take up time, it is going to get us testing faster than my pestering of Livingstone Hire for the ECL pods.

For the second version of the "Waveform Processor - Digital" the new ECL RAMs still haven’t arrived, but the Ambar-Cascom rep assured us that they had been despatched from the U.S.. He was much more apologetic about some ECL PALs which are several months late, and for which he didn't promise delivery for at least another month, which tends to imply that he believes that the RAMs will reach us soon. Under the circumstances, testing him with the Megger did not seem appropriate.

Andrew Dean and Peter Milne have agreed to put off the second Delay board for an indefinite period, perhaps until the revised Delay boards appear - according to Peter's plan it will be some time before he has to write the software that uses both boards in cooperation.

Andrew and Peter have found a way to hang-up the Timebase system (the hang-up can be cleared by the processor, but the system ought never to hang-up). On Monday, Andrew and Peter and Yohannes and Bob Ward and I are going to work out a way of stopping the hang-ups - there are a number of possibilities, and it is to be hoped that we can find one that is likely to work.

Kevan Purton doesn't seem to have given Andrew any pen plots to check this week, but there will be lots next week, or so we are told.

GS Designs are not doing any better with the Trigger Board layout; the new artworks are being plotted now, and won't be here until early next week.

The Plinth Control card has made a bit more progress; we now know two of the reasons why the Penning Gauge outputs were not working (wrong value resistor, and comparator H14 run from +5V rather than +15V) and when we have fixed both of them we may be in a position to search for the rest of the problems with the circuit.

Steven Fisher has modified one of the part-loaded Timebase Interface cards so that it drives the Plinth Control card and only the Plinth Control card; so far it has been tested as a transmitter only - the read-back side should be checked out on Monday.

Yohannes' circuit diagrams and parts list for the revised Timebase Interface has now gone through ATE and is sitting in PCA waiting to be picked up - Kevan expects the job to get under way early next week.

Yohannes hasn't been able to get time on Meth 1 to run any simulations on the new circuit.

Paul Austin is away moving house - Thursday being as windy as it was, one hopes that neither house got blown away, in whole or in part, nor any of the tea-chests either. The first few days of the week, Paul still seemed to be up-dating the Ion Pump Monitor circuit diagram.

(Note added 28-07-2017 : That was the 1990 Burns Day Storm that killed 97 people in the UK – marginally less intense than the Great Storm of 1987, but since it hit during daylight hours it killed more people.)

None of my conversations with Trevor Sexton or Chris Warner has been particularly memorable or worthy of report. Trevor is off today, at the wedding of one of his cousins. Tien Kho claimed to be planning to go down to Australia House today, to help them celebrate Australia day, which sounds more like the sort of thing I'd expect Trevor to do.

Since my wife is in Austria at the moment, our annual Australia Day party has metamorphosed into an Anzac Day party (in April).

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 2nd February 1990

Bob Ward and I have put in some time on the Trigger board; at one point I blew up a pair of his PALs, which justifiably irritated him, but he was able to get replacements blown from the ATE files very promptly - he had deposited the files with them, as we all should.

Initially we were helping Peter Milne get his new Autotrigger routine running, and once we had worked out that the routine wasn't writing to the DAC what it should have been, Peter had relatively little difficulty in getting rid of the residual bugs.

With the new Autotrigger routine I went on to start checking out the performance of the Trigger and External Clock inputs.

The Low-Z Trigger Input will trigger at 500MHs with a 160mV square wave; changing the mark-to-space ratio to 500psec-to-l.5nsec took this limit up to 200mV. We should be okay at 1GHz.

The Low-Z External Clock input ran up to 300MHz with a 500mV square wave, then died at higher frequencies; the input stage is fine at 500MHz and the problem appears to be in the GaAs divide-by-16 counter. Since the counter is set up to load when the Active Trigger output goes high, we may not have a problem when operating the Trigger board with a Delay Board.

The Hi-Z External Clock ran fine up to 125MHz with a 400mV square wave but won't work reliably with less than 400mV of square wave at any of the lower frequencies I looked at.

The Hi-Z Trigger input performs a little worse; it needs 600mV of square wave to work satisfactorily at 100MHz, falling to 400mV at lower frequencies.

Poking around inside the circuit, it looks as if the input stage has a 3dB point around 150MHz.

Both circuits trigger with less than 400mV of input swing, but as the input swing is reduced the Trigger/External Clock frequency as measured by the Trigger board starts deviating from the frequency measured on a counter.

The deviations arise from about 200mV of random noise on the inputs to the AD-96685 comparator. We need to work out where this is coming from (I suspect the threshold generator) and work out how to reduce it - the bandwidth of the threshold generator circuit as a whole is unnecessarily high.

If we could eliminate this noise, the circuit could work with down to 20mV of input swing (where it would run out of gain and threshold resolution more or less simultaneously).

We don't need this much improvement, but it would be nice to have enough sensitivity to let the user plug a 10X scope probe into the Hi-Z inputs and derive an adequate trigger signal from logic-level swings.

The work on the Trigger board rather slowed down my progress with the 200psec Blanking Board. Once we got the TaxiChip transformer on Monday I was able to find out that Yohannes translates the VME addresses 01ff8400 and 01ff8402 into 0200 and 0201 before he transmits them to the Blanking Board. By the time Paul had reprogrammed the PAL, the Trigger board was hogging the Timebase crate, and it took until today for me to try the new PAL. I had to replace a 74HCT74 which had died, but after that it seemed to be working before Peter Milne slung me off earlier this afternoon.

Of course the PAL has to be reprogrammed again sometime, to get the ATE input into conformity with my board, rather than ATE's custom and practice (carried over from the 16V8 and 16R3) but for the moment a wire link matches the board to the PAL.

Next week I should be able to run through the board functions, and probably drive an Unblanking Pulse into the Iwatsu (through a 10x attenuator, of course).

Paul Buggs is now driving the "Waveform Processor - Digital" from the HP-8175. It doesn't seem to be a particularly rewarding occupation. Bob Anderson showed up today but he doesn't seem to know how to get the system to load the "n" and m loop counters either, and he and Paul seem to be resigned to fossicking through PAL tables in the hope of finding out.

(Note added 31-07-2017: nearly thirty years later, I can't remember exactly what the “n” and “m” loop counters were. This is what seems to make sense.

The waveform processing hardware got it's input by digitising the output of the secondary electron detector, integrated over 20nsec by a “transversal filter”. The electron beam wouldn't deliver more than 625 electrons (with a standard deviation of at least 25 electrons) in a 20nsec period, so it was never worth digitising that signal to more than 6-bit – the 4% shot noise dithered out the 0.5% rounding error. If we were unblanking the electron beam for more than 20nsec, we'd add successive digitised outputs into the local accumulator at 20nsec intervals. Once the unblank period was over, we'd add what we had accumulated to whatever had been accumulated at that instant on earlier passes through the sampling list, and write that back to the Accumulation Store, which consisted of 1028 16-bit words – mostly we used only 256 of them. We could read, add and write within 40nsec.

If we unblanked the electron beam for only 0.5nsec the beam wouldn't deliver more than 16 primary electrons, and it wasn't worth paying attention to more than the two most significant bits of the analog-to-digital converter output. There was a shift network – the Input Shifter - between the ADC and the accumulator which could upshift the ADC output by up to 8bits (to speed things up during set-up) or down shift it by 4 bits for short unblank pulses, small spot sizes and the like.

If you added more than 2^10 (1028) 6-bit words into at 16-bit word, it could overflow, so if we made “n” simple passes through the sampling list with digitisation to 6-bits, n had to be less than 1028.

This could get the rms shot noise down to as low 0.12%. There were situations where the user would want to be able to do better.

It took at least 10msec of signal accumulation to get to that point and we could then reconfigure the latches around the 16-bit wide ECL adder hardware to subtract the content of each Expected Waveform Store cell from corresponding the Accumulation Store cell, and load the difference back into the Accumulation Store into the Expected Waveform Store, and add the - altered - content of the Accumulation store to Expected Waveform Store after down-shifting the difference in a separate Feedback Shifter by anything up to seven bits (depending on how many previous processing passes we'd made through the sampling list) and move the revised result back into the Expected Waveform Store. These operations were spread over a couple of processing passes (Subtract, Update1, Update2, or Zero, but each one only took about 10usec per pass if 256 samples being crunched. This was a Processing Loop, as opposed to a Sampling Loop. The number of times that we crunched the Accumulation Store into the Expected Waveform Store was the “m” loop. If I remember rightly, the Expected Waveform Store was duplicated into the Output Store which could be read by one the VME bus or by the Image Store while the Waveform Processor – Digital was hoovering up more data.

There was a flaw in the execution of the Feedback Shifter which we didn't find until 25th January 1991. I fixed it – for a limited but adequate range of shifts – on the day we found it, and once we'd found it we got the system working well enough to demonstrate within a few weeks. It was the last of the disabling defects.)

Paul has also got Gerard to wire up a "dummy Waveform Processor - Analog" which is a DIN-41612 connector on enough Veroboard to carry six links to allow him to set up any possible ADC output, which will let him test "Accumulation".

Andrew Dean and Kevan Purton are still negotating the re-layout of the Delay board; I've seen very little of the new layout .

The round-table discussion on how to avoid hanging-up the Timebase system hasn't happened yet; Andrew wants to get back on the Timebase Crate to examine the problem, but between me with the Blanking board, and Bob Ward and Peter Milne with the Trigger board, Andrew has had a rather thin time of it.

I think it is important that we do make sure that the Timebase system won't hang up, but I have a nasty suspicion that it is going to take an effort to get everybody thinking about the problem.

Large areas of the Plinth Control card are now working. Today's problem is in reading back data from the card across the TaxiChip link, and is reputed to lie in the timing between the Enable pulse which allows a particular buffer access to the output data bus, and the TaxiChip Strobe edge which latches the data into the TaxiChip transmitter. Peter Milne and Simon Dawes seem to have resolved to pass the problem on to Bob Ward on Monday.

Once this is working, the stage motor controls and the touch plate alarm will be brought up. There is a - so far theoretical - problem with the 7060 32-bit counters which we really ought to solve; they are ripple counters, and it can take up to 4usec for data to ripple from one end of the counter to the other. The process of latching the 32-bits of counter output into 5 8-bit latches, for eventual demultiplexing onto an 8-bit bus, is completed within 250nsec, and if it happens while a carry is rippling though the counter, the number latched will be violently wrong - on the transition from Offff to 10000 the latches could capture 00000.

On the Plinth Control card, where the maximum count rate is about 10kHz, it is possible to use a monostable triggered by the clock to hold off the Latch Clock for the necessary 4 to 5usec.

On the Trigger board, where the maximum clock frequencies go up to 6.5MHz, this approach is not feasible, but the Trigger board clocks could be disabled for 4usec before the counter outputs were clocked into the latches; the Trigger and External Clock frequencies derived from the contents of the counters would be no less accurate than before, although all three counters would accumulate marginally less counts.

Clare has started on laying out Yohannes' new Timebase Interface; on Wednesday I had to do some brisk scrambling to get her dimensioned drawings for the "mixed" D~type connectors we are putting on the front of the board to accommodate all the co-axial cables. It is months since Yohannes and Simon and I decided that these connectors were the right way to handle the numerous coax connections onto the fronts of the Cursor card and the Timebase Interface, and none of us had gotten around to getting drawings and raising part numbers. This is now done.

Paul Austin spent this week wrestling with the Simulation Mode on the RAM Store; it was intended to simulated Burst mode operation, but we changed Burst Mode fairly late in the design process, so Paul is pursuing the job mainly to make sure that he really does know what PAL does what and how.

The Ion Pump Monitor board is now stuck in PCA waiting for the guy assigned to it to come free; Paul will add a little to the circuit diagram after PCA has finalised the layout, but at present the drawings are as complete as they can be.

Paul seems to have survived unscathed the trauma of moving house. He blames the gash in his eyebrow on squash, rather than domestic upheaval.

Trevor Sexton and Chris Warner seem to have spent most of this week dismantling P1 around in marketing; I had to introduce Chris Warner to the coil winders so that he could borrow their Hall effect probe to look at the coils out of the top of the column - it seems that they were okay.

I understand that Peter Milne has been tinkering with the column control software to allow Trevor and Chris to drive the coils more sensibly, and that this has had a measure of success. It is to be hoped that the triumvirate has equal success with the scan coils.

I proposed a scheme to Chris to let us work out whether we need loads more volts on the scintillator, by operating the machine with about a picoamp of beam current (about six million electrons per second) and using a counter to look at the output of the head amplifier - this what Mike Penberth did some time ago on the S.360, and it seems to work.

Mike actually introduced a 2465 scope between the head-amplifier and the counter, to act as a discriminator, so that you could see what you were counting. It has quite a lot of dead-time, but Chris knows about correcting for dead-time - it is a Manchester speciality.

Trevor reputedly thinks that dead-time is what follows drinking-time – I could elaborate on this but I decline to risk the rubber-band between the eyes.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 9th February 1990

This week I have been wrestling with the Blanking Board pretty much non-stop. I'm winning, but slowly. It took me all of Monday to realise that there was something odd about the PAL; in an effort to determine whether it was a duff PAL program or a duff PAL, I re-edited the PAL file and threw in some test vectors before reprogramming the device on Tuesday. After reprogramming it worked fine. I wish I knew why.

I was then free to work out why the DAC on the board was latching the wrong data, which wasn't difficult - just embarrassing. From there I went on to set up a latch clock which does work, which meant adding a 74F10 triple three-input NAND gate to the circuit.

I spent most of Wednesday afternoon cutting and linking the new device onto the board (directly on top of the 74HCT74 which had been doing the job before, as it happens). I'm thinking of entering it in the Lintech Memorial Bodge Competition, although Trevor Sexton claims that it is not nearly repulsive enough to maintain the Lintech tradition. For one thing, it works.

I spent the rest of the afternoon running my off-set generator from +75mA down to -75mA and back again, until the Timebase Interface went bad on me.

On Thursday morning, Yohannes looked at the Timebase Interface board, and proved that there was nothing wrong with it - in other words he prodded the dry joint - and I went on to check out the Control bits on the Blanking Board.

Most of them were okay, but the switches that turn on the -35V supply to the Blanking Driver gave me quite a lot of trouble, particularly when the -35V power supply decided not to turn on.

My problems with the board started with Rodger Snook laying out the critical BC-212 transistor the wrong way round, which took out the 74HCT574 latch that drove it.

When I replaced the BC212, I used a part with a centre collector pin-out, which took out another 74HCT574.

The next BC212 had the right pin-out, but it turned out that the VN66AF MOSFET switch that it was driving had also blown up, which took out that BC212 with an audible crack, and a third 74HCT574.

When I replaced that lot, I threw in two more 10k resistors to make sure that the next failure doesn't propagate.

While I was trying to check out this latest reconstruction, the TAXIchip link went down again, and it took me quite some time to realise that a balanced TAXIchip link still looks as if it is running, even when one of the cables has come unplugged.

And when I'd got that lot sorted, Bob Ward had gone home and the cables he made up to feed fast signals into the back-plane were inaccessible. I may be able to look at Unblanking Pulses this afternoon.

Bob and Peter Milne have done some work on the Trigger Board, sorting out the widths of the Unblank pulses, the Convert delay, and the Encode delay, all three of which are programmable, albeit with differing resolution, and over vastly different ranges.

Most of Bob's time this week has been spent on the documentation for the revised Trigger board - adding grid references to the component references, adding new components to the parts list, and sorting out film plots for Surtech. Mike Rolfe has been a regular visitor.

Mike Rolfe has also been raiding my stocks of components to complete his kits for the next Trigger boards and Blanking Driver boards.

We haven't done anything about the noise in the Hi-Z Trigger/External Clock inputs - I've pencilled in a couple of capacitors on Bob's circuit diagram for the Trigger Input, and I guess we will eventually get around to seeing if they have any effect.

Paul Buggs has made considerable progress on the "Waveform Processor – Digital”. After fairly prolonged consultation with Bob Anderson and Dave Ward of TDS, he has now run the board through a complete processing cycle - from the Reset state, through a few sampling passes in the Accumulation state, then through the Subtract, Update1, Update2 and Zero processing states. The results were nonsense, and Paul is now cutting and linking 11 tracks around the Input Shifter to transpose the high order byte (which TDS had drawn wrong, and I hadn't noticed). He isn't too happy with the Feedback Shifter either, but it is bigger and more elaborate than the Input Shifter because it has to shift a whole lot further, and it will take more study before he can convince himself that it too needs cutting and hacking.

In order to get at the board to do the cuts and links at the Input Shifter, Paul had to remove several heat-sinks. His first attempt succeeded in removing the heatsink, but also took part of the IC with it, with several of the legs taking their pads off the board in the process.

I used my jacking bolt on the next IC and cracked the beryllium oxide lid (releasing a little highly toxic beryllia dust into the lab atmosphere, as I just realised). Thereafter we used the Groatmoor hot air blower (it keeps on applying for a transfer to Marketing) to get the heatsinks good and hot before we tried to remove them, and found that about 90 seconds of baking softened up the heatsink adhesive quite effectively.

I don't remember having this sort of trouble with the Trigger board, but on the Trigger board the heat sinks are well spread out, and I could always get a knife blade in between heat-sink and lid.

Fairly soon, Paul will have to adjourn his cutting and linking and put together another package of mods for Bob Moore. Earlier this week GS Designs sent me a large-scale pen-plot of the tracking around the 7.5MHz local oscillator, which I haven't really looked at yet.

The PLCC-packaged SRAM chips for the new layout still haven't arrived from Cypress (or Aspen as that branch of the company is now known). David Blumstein of Ambar-Cascom is now telling me that the chips are awaiting Customs clearance at Manchester airport, so they should arrive soon - or at the very least David Blumstein should be commended for keeping his story consistent.

We haven't yet touched the "Waveform Processor - Analog".

Andrew Dean spent some of this week working on Image Analysis, about half a day on investigating our mains wiring practice in the lab, and the rest of the week working at the Metheus system on the Delay board circuit diagrams, which are now not only up-to-date, but also moderately intelligible (Yohannes and I found ourselves trading off intelligibility against early completion, with Dave Hall rather on the side of early completion).

The circuit diagrams are now almost complete - there is perhaps another day's work needed to finish them off, and I'm encouraging Andrew to finish them off now, before he risks going back into the lab. It seems our wiring practice is to take all earth pins back as far as the nearest bit of metal conduit and call that ground. I am told that this is not now permissible for domestic wiring under the IEE Wiring Regulations, and it certainly lead to a measured resistance of 8.93Mohm between "mains earth" and a handy cold-water pipe, falling to 1.2ohm when we wiggled the conduit (which was loose).

Andrew's desk is now almost immersed in pen plots; Kevan Purton has complete a revised layout for the Delay board, and Andrew and I will have to check it next week. Jack Warner has checked Kevan's netlist against Andrew's original marked-up prints; as soon as Andrew has completed his revised circuit diagrams we will give Jack a of set prints to check against the same netlist, while Andrew and I are checking out the details of the layout.

As far as I know, the Timebase system can still hang up in Burst mode - I hope that Andrew and I can have another look at that next week.

Paul Austin's campaign against the Simulation Mode on the RAM Store is still going on; he has won several battles, but the war isn't over yet. It is proving to be quite a useful exercise; at least one of the PALs on the Waveform Interface board did not conform to the design data supplied by Syscom. When the PAL was reprogrammed to conform to the design data, it worked better, but still wasn't right. Paul is starting to worry about the other PALs on the board. If things get any stickier he will call in Paul Duesbury from Syscon.

The Ion Pump Monitor board is coming on - Tom McNamara is on it full time now, and hopes to finish it by the end of next week.

Simon Dawes and Steven Fisher have had a reasonably productive week with the Plinth Control card; they can read back the limit switches and the ADC and in fact everything is working except the Motor Drives. Achieving this took quite a lot of work. Bob Ward had designed the board to read back in response to a two-access sequence, and because he was out when this bit of the board was being looked at, the board is now reading back on single access, with more complex PAL programs and a couple of cuts and links. I overheard Simon and Steven and Peter Milne while they were concocting the new PALs and they seemed to be having a whale of a time. One can suspect that Bob would have got the two-access sequence working with less effort.

This leaves us with a bit more of a problem in up-dating the Plinth Control Card circuit diagrams, and the Part B Specification of how it works - as it stood, Peter Milne was responsible for the parts of the circuit derived from the old Vacuum Control card, Jim Rose for the parts derived from the Motor Drive cards, and Bob Ward for the TAXIchip interface. Getting the circuit diagram into Metheus also involved Simon Sheldon (briefly) followed by Mac.

Simon and Steven are going to have to prepare marked-up prints of the circuit diagram to enable PCA to up-date the printed circuit layout, and now that Janet Webb is going to be trained to drive a Metheus terminal, we can probably expect PCA to up-date the circuit diagram as well.

Checking the revised circuit diagram will require engineering intervention, and writing the Part E Specification could be quite difficult; Peter Milne could well end up lumbered with everything except the TAXIchip interface.

One minor aspect of testing the Plinth Control card consisted of hooking up the photomultiplier Head Amplifier and checking it out with the photomultiplier EHT set to maximum, which turns out to be -2.4kV. Unfortunately, the XP-2982 tube has an absolute maximum rating of 2.0kV and with the divider network I've used it shouldn't see more than 1.65kV, which is the highest voltage the divider network is designed to sustain.

So the divider network burnt out. We are going to change the Plinth Control card such that -1.65kV is the highest voltage that can be applied to the photomultiplier.

Clare has now finished laying out the new Timebase Interface board. I had a look at the layout around the front of the board, where the TAXIchip signals come in and out, and that looked okay.

Trevor Sexton and Chris Warner have had another happy week on PI. The gun align coils now work quite well, and the stigmators stigmate without moving the beam. Unfortunately, to get the stigmators working properly, one of the coils has to be wired up wrong way round (and that is wrong way round as measured with the Hall probe) so Trevor and Chris are feeling somewhat confused.

They are now working on the scan coils, trying to get the rocking points in the right places, and they have hopes of finishing this off by the end of the afternoon.

Once they have got that right, Trevor wants to power up some of the TTLD grids to see what they do to the beam, and after that he hopes to fit the column with an LaB6 source.

We have sold an EBT to Samsung. The spec refers to Trigger rates up to 1GHz, which we can't test, and a Trigger Sensitivity of 100mV, which we can't achieve so far (see last week's report). There are also references to voltage accuracy (5%) and linearity (1%) which we haven't demonstrated with the new TTLD, and a voltage display range down to l0mV which is going to look fairly silly with the lowest noise level of 5mV (which we haven't demonstrated).

The specification locks us into a 768x512 stored image which may not be sensible - 512x512 could allow us to store 16 frames per image store memory card, rather than 8.

I suppose it could have been worse.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from: A. W.Sloman

subject: Progress to 16th February 1990

I spent Monday and Tuesday worrying about the work we will have to do in the next financial year after we have got the machine working.

Marketing had covered the high spots; I think we also need a new scan generator board, probably adapted from the S.360's to let us generate scan rate lower than one frame every 10 seconds, new gratings for stage position that are easier to align, and a new Blanking Head to get round the transit time problems of the existing head - I doubt if we will see a real 200psec pulse until we get a new Blanking Head.

Wednesday I got back to the 200psec Blanking Board, and proceeded to destroy four 10G000A-4C logic gates; when I put the last pair onto the board I put a blob of solder onto each of the 80 pads on the board, and put wire links in to replace the lengths of delay cable which determine the pulse lengths when the board is working, and stick up far enough to foul the Groatmoor machine when the board is being reworked.

Whether it was the anti-static precaution, or the extra solder, the last pair of 10G000A-4C NOR-gates actually work.

The Blanking Board with the Blanking Driver now produces Unblanking pulses of a sort - the waveforms up to the driver stage look okay but at the output the turn-on edge is slow, and shows about two cycles of 1GHz ripple. I should eventually be able to find and bypass the inductance involved.

The scheme for off-setting the output pulse actually works; the 0.5nsec pulse setting produces a 0.5nsec pulse, but at about half the right amplitude, and I was able to off-set the output to bring the peak of the pulse up to 0V (from -3.5V).

Bob Ward has done a bit more work on the Trigger board, but I think that he has been concentrating on finishing the Part B Specification, rather than changing bits of the board.

Paul Buggs has now completed his modifications to both the Input Shifter and the Feedback Shifter; he has been able to prove the operation of the Input Shifter, but before he can check the Feedback Shifter he has to be able to write known data into the Accumulation Store, and its address counters are not counting … Paul is fairly sure that reprogramming another PAL will solve the problem, and allow him to move on to the point where the next problem becomes visible.

Paul has given me a marked-up print for the mods to the Shifters, which I shall pass down to GS Designs as soon as I have gone through the Local Oscillator tracking and can give GS Designs a single package.

Andrew Dean and I have been intending to get together on the Delay board all week; my slow progress on the Blanking board has frustrated this, but we will get on with the Delay board first thing on Monday.

Jack Warner and Kevan Purton have checked out Andrew's new circuit diagram for the Delay board against the PCB netlist, and checked out the differences against the old circuit diagram. What remains is being resolved now.

Paul Austin has had an unexpected triumph with the Simulation Mode on the RAM Store; he has achieved single line transfers, and expects to get full frame transfers when he can get extra timing signals. He isn't too happy about this achievement - he got Peter Milne to write a short program in assembler to make the simulation faster. The theory was that with a rapid loop, he could capture enough data in a logic analyser to get some idea of what was going on. Unfortunately, the rapid loop ran reliably, so Paul still doesn't know what was causing the slow transfers to fail.

Tom McNamara now expects to complete the Ion Pump Monitor board by next Tuesday; checking will probably take another day or two.

Simon Dawes and Steven Fisher have had another productive week on the Plinth Control card; they have mainly been tinkering with the board to organise the computer-controlled outputs and the computer-readable feed-backs such that what gets read-back is pretty much what was written in (in normal operation).

There is a problem with the Filament Current supply, which should generate 6A at 24V but won't go above 3.0A - Simon thinks that it was modified to limit at this level to protect LaB6 sources, but hasn't been able to find the documentation for the mod.

Trevor Sexton and Chris Warner are feeling less confused about the stigmators, but this may not last beyond their next opportunity to test their current hypothesis. They are now a good deal happier with the performance of the scan coils; they will compare this set of scan coils with the next set off the production line before they come to any final conclusion.

Peter Milne has been shuffling Syntels to try and keep everybody happy; I think he is now compiling on the Timebase Syntel, so Bob Ward, Andrew Dean and I all have remember to ask Peter before even thinking of taking power off that processor and the Timebase Interface.

(Note added 2012/10/12 – the “Syntels” were 32-bit single board computers that plugged into the VME bus that controlled the EBT and its various components.)

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin,, John Harrison, Roland Meins, Andrew Dean, Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 23rd February 1990

I haven't made any progress with the 200psec Blanking Board this week; the Iwatsu sampling scope hasn't come back from Datron yet and is now promised for the middle of next week, and the Tektronix sampling scope has just gone back to Tektronix for repair and recalibration.

Paul Buggs was excessively optimistic about getting the Accumulation Store Address counters working - reprogramming the PAL didn't solve the problem, and at last report he was chewing his beard and muttering about dry joints.

There has been some progress; I checked over the 7.5MHz Local Oscillator layout on Tuesday morning. My comments, plus Paul Buggs' latest set of corrections to the "Waveform Processor - Digital" got sent off to GS Designs that afternoon.

I've asked Andrew Nightingale to pull the circuit diagrams for the "Waveform Processor - Digital" out of the Metheus archives, so I that I can up-date them with Paul's corrections. Andrew was at college on Tuesday, so I didn't get around to asking him until after lunch on Wednesday, and when I got the archived diagrams yesterday they were the July 1989 versions. We should be able to get the December 1989 versions off the tape back-ups.

Bob Ward hasn't done anything with the Trigger board this week. Printech finished the new boards on Wednesday, then hung onto them in the unfounded expectation of getting to load them in their new surface mount assembly shop. Mike Rolfe expects to ship boards and kits off to Surtech by Wednesday next week - always assuming that Purchasing comes up with an order number by then. It seems that while Surtech have had solder paste artworks for the board for a fortnight now, they haven't made silk screens because they haven't had an order number - apparently Richard's habitual urbanity lapsed for a few seconds when he got that bit of news.

Andrew Dean and I have spent a couple of days on a close look at some of the layout on the Delay board; we haven't found any serious problems, but it will take Kevan several days to make all the minor (but essential) changes we have asked for.

This exercise involved looking at the protection on the input of the AD-9002 ADC, which reminded me that there wasn't any on the AD-9002 input on the "Waveform Processor Analog (854698). It turns out to be fairly simple to put a diode clamp near the video input and this ought to solve the problem.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk

from: A.W.Sloman

subject: Progress to 2nd March 1990

Bob Ward spent a fair bit of Monday afternoon getting the December versions of the "Waveform Processor – Digitaloff the December 1989 back-up tape for me - I hadn't realised how long the system took to read a complete back-up! But the recovered files are now back on Meth.3 and I've edited them to include Paul's latest corrections.

Paul has now got the "Waveform Processor - Digital" to run through a full processing cycle, from Sampling, to Subtracting, to Update 1, Update 2, Zero and back to Sampling. Whether it does all the right things in the last few processing states has yet to be determined, but at least we are now in a position to find out.

Tuesday I mostly spent worrying about the ADC protection for the "Waveform Processor - Analog" (854698) again. The diode clamp looks fine (and I must put it on the board on Monday), but with the board as it is to work, the input to the ADC will rise from -2V to 0V with increasing photomultiplier gain, then - as the gain rises even further - the clamped voltage will decline (rather more slowly) to about -1V. This is a feature I can eliminate by swapping the video signal polarity at the input to the "Waveform Processor Analog" and at all the outputs, but that means lots of small changes to the layout. It isn't worth cutting and linking onto the existing board, but it would be worth doing if we had to make any significant changes to the layout.

Tuesday I also raised part numbers and a purchase request for some 3-cavity mixed D-type connectors for the Timebase Interface Board - they have mysteriously appeared on the board since I sorted out the 8-way connectors. I didn't notice them (or maybe thought they were bare SMB sockets) when I last looked at the layout.

Wednesday was the "Advances in Electron Beam Testing and Failure Analysis of VLSI Circuits" meeting in London; Steve Henning was the man with the typed badge, but Andrew Dean, Chris Warner and I were there too. I had a useful talk with Don Ranasinghe of BTRL about plastic scintillators - he has promised me a pre-publication copy of his paper on the subject. He claims that you can get much longer life out of a plastic scintillator if you aluminise it with an deposition unit that is only used to deposit high-purity aluminium, because if the metallisation is contaminated with higher atomic weight metals - zinc, copper and gold amongst others - they migrate into the scintillator material and poison it.

Yesterday I finally up-dated my circuit diagram for the 200psec Blanking Board", and had some afterthoughts about the "Waveform Processor - Analog".

Today the Iwatsu sampling scope actually arrived, but I am going to finish this report before I get onto the Blanking Driver .

Kevan Purton has pretty much got through with the mods to the mods on the Delay Board; he hopes to be able to hand the layout over for checking early next week, which would mean that it might get to Printech by the end of the week (with lots of luck).

Andrew Dean has been digging holes around his house, and finding rather less foundations than he had hoped for - this has left him enough spare time to keep Kevan going.

Bob Ward has been wrestling with the Plinth Control Card; there was a problem with the PAL that looks after the pulse generator for the motor drives, and the pulse counters. Bob is confident that he has found the problem, and fairly confident of his solution, but he is still writing test vectors to make sure that his state machine will recover from every illegal state.

Paul Austin is still struggling with the write error on the Dual Port RAM; he has tried a couple of his own mods that didn't solve the problem, and one mod - equally unsuccessful - suggested by Syscon. He is about to try another mod from Syscon when ATE finally lets him reprogram his PAL.

Meanwhile, Paul B's progress on the "Waveform Processor - Digital" is bringing us closer to the interesting day when we try and exchange image data between the Waveform Processor and the RAM Store. We may have fun getting Burst Mode working.

Simon has been working on the Plinth Control Card; in addition to collaborating with Bob Ward on the motor drive problems he has checked out the Touch Alarm and had a go at the video amplifiers - which are oscillating. He may be able to cure the oscillation reducing the impedance levels around the amplifier; there is room to reduce them by a factor of four.

Simon has also been working on the parts list - we have now got part numbers for all the mixed D-type connectors on the Timebase Interface board.

Peter Milne has found a bug in the P2 User Interface, but is confident that there are plenty left to find; quite sufficient to make the interface crash frequently for some time to come.

Chris Warner has measured some values of C3 current versus Extraction Voltage versus Beam Voltage versus Working Distance on P1. The curves he gets look reasonably smooth, so maybe we will get a Working Distance read-out sometime.

Trevor Sexton is off skiing in Vermont with Ralph Knowles. I don't think that there was any plan for Trevor to drop in on IBM and sell them another EBT; from what Trevor has said about installing the first EBT we might need to rename the system before IBM would give it serious consideration.

(Note added 2012-10-12. The “EBT” sold to IBM will have been one of the Lintech machines. They were difficult to keep working, and Trevor in his time as a service engineer for Lintech, spent a lot of time getting them working again.)

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk

from: A.W.Sloman

subject: Progress to 9th March 1990

Paul Buggs has now got the "Waveform Processor Digital" working in conjunction with the Trigger board, and has had them run through a Reset pass. This meant reprogramming a PAL on the "Waveform Processor - Digital" to change the polarity of one of the output signals, and reprogramming a PAL on the Timebase Interface so that the address ranges of the Waveform and Timebase Interfaces did not overlap.

The Delay board will be plugged in sometime soon, and the "Waveform Processor - Analog" sometime after that - I've cut and linked in my protection network onto the "Waveform Processor - Analog", and Richard Adams has found a pair of ribbon cables with the right connectors to link the "Waveform Processor - Analog" to the "Waveform Processor - Digital".

The artworks for the revised Delay board have come back from photoplotting, and should be Dataposted off to Printech this afternoon if Dr. Plows signs the order in time.

Bob Ward has been consulted during the integration of the Trigger board with the Waveform Processor, but the Trigger board was okay; he has had a bit more to do cleaning up after Jim Rose on the Plinth Control Card, programming a couple of new PALs and sorting out the reversed data bus on the motor counter outputs.

The bulk of the work on the Plinth Control Card has been done by Peter Milne, Simon Dawes and Steven Fisher, and they think they have almost made it - nine out of ten of the motors are running, and while the counters are still counting oddly, they have found and recently fixed a fault which may have been the source of that problem.

Paul Austin is still wrestling with the Dual Port RAM board; he and Paul Duesbury have tried a couple more mods, and they don't entirely solve the problem - Paul A will probably drag Paul D over from Syscon when he can negotiate a full day's access to the Processing Crate with Paul B and other interested parties. There is a Paul Cormack in Sales, but he probably isn't an interested party.

Paul Austin is also learning his way around the "Waveform Processor - Digital"; he is the latest recruit to the cast list of this epic drama (the role was created by Bob Anderson and taken over Dave Ward and Dave Cox of TDS before being thrust on our very own Paul Buggs).

Chris Warner has been doing more plots of C3 current at focus versus Extraction Voltage versus Beam Voltage versus Working Distance on P1, and they don't agree with his last set. This is disturbing, if roughly what you would expect of P1.

Chris has also spent some time looking at our scintillator in the light of Don Ranasinghe's letter on the subject - it looks as if there are lots of things we can do to make the scintillator work better and last longer, and Chris is getting on and doing some of them.

Trevor Sexton is reputed to have returned from skiing into trees in Vermont; he has a couple of cracked ribs but is expected back at work next week. History does not relate how well his video camera survived the interaction with the tree, nor what he was recording with such avid interest.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk

from: A.W.Sloman

subject: Progress to 16th March 1990

I've spent almost all this week on the Blanking Driver, and I've finally worked out why it was running faster for Kevin Jackson - the new Blanking Board drives Kevin's "turn-on" path as its "turn-off" path, and his "turn-off" path as its "turn-on" path. On the circuit diagram these paths appear to be identical, but Kevin's layout is asymmetrical.

The 200psec Blanking Board now sports a cut-and-link modification that swaps the "turn-on" and "turn-off" drivers. There is still a nasty 950MHz resonance in the emitters of the three driver transistors, which I can greatly ameliorate with a quarter wavelength stub (or "tuned exhaust") but really needs hunting down in the layout.

If we get a 200psec pulse out of the current board, it will be by clipping the peak off a 500psec pulse by playing with the voltage offset - there is still some days work to go in setting up the board to give "200psec, 500psec, lnsec and 2nsec" Unblank Pulses.

Andrew is rightly critical of some of the layout around the output stage of the 200psec Blanking mother board, which we can correct without much difficulty, but I doubt if this will significantly improve the edge speeds on the Blanking Driver daughter board; the 5GHz bandwidth of the BFT92 level shifter transistors is probably limiting us already.

The Delay board got plugged into the Processor crate on Monday, and since then Andrew Dean and Paul Buggs have found and fixed one error on the Backplane (I think PCA fixed it long ago, but we are still working with the first batch of backplanes), two problems on the Delay board (a missing pull-down resistor and a drop-off in the External Clock/Local Oscillator change-over logic) and my drop-off on the Trigger board, where my divider/level-shifter on the output of the 800MHz VCO level-shifted a bit too far.

The infamous hang-up problem has re-appeared, but Andrew (in consultation with Bob Ward) is now fairly confident that he knows what is going on. Andrew thinks that it is a member of the class of soluble problems, but I'm not sure what sort of solution he has in mind. In the short term, a second "Go command solves the problem when it appears.

Paul Buggs has had independent problems with the "Waveform Processor - Digital" - one of my cut and links on the 5V rails shorted to one of the mod wires, creating a bad smell and some anxiety until it got found and fixed - but Paul is now getting the "Waveform Processor - Digital" working with both Delay board and Trigger board.

Paul Austin has had another go at the Dual Port RAM card, but after consultation with Richard he has given up - at least until Peter Milne declares the DP RAM useless as a RAM-Disk. He spent the rest of the week multiplexing between the Ion Pump Monitor Board and reading up on the Waveform Processor. Next week he will start trying to bring up the RAM Store crate for P2 - he has just got the first revised Naffbus Interface card which he needed to complete the set. He will also try to get some exposure to the reality of the Waveform Processor, as opposed to the fantasies about it embodied in my specification.

Mike Rolfe and Bob Ward have been talking to Surtech about the Trigger Board which is now pretty much loaded. We should be getting it soon. A pair of Blanking Drivers are also being loaded, and Mike and I have had to provide some answers on them.

Mike Rolfe is waiting on an official kitting list (with printed labels for every item) before he kits the Timebase Interface, and we are supposed to be getting the loaded board back by the end of next week.

The Delay board artworks went off to Printech last Friday, on schedule, and eight boards should be coming back on the 3rd April - two days later than they would have done if Mervyn had not gotten nervous about raising a 7,000-odd pound order.

Back in the real world Peter Milne, Simon Dawes and Steven Fisher have had another happy week on P2. The Plinth Control card is pretty much working, and most of their problems have been with the bought-in gear - including a gear-box that ran backwards.

They had an image of a sort on Wednesday, and promptly dismantled the column to put in a different and hopefully better TTLD. Maybe they will have better images next week.

P1 isn't producing any images at all, much to Chris Warner's disgust. Simon was going to go in and sort the machine, but P2 pre-empted this. Trevor Sexton still hasn't brought his ribs in to work, so he hasn't been available to fix it either, and Chris has occupied himself with project planning and reading the literature.

I had a session with John Harrison on driving the Waveform Processor, and what all the various shifters are there for. He went quiet after a while and went away. I think this was because he was replete with information .…

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk

from: A. W.Sloman

subject: Progress to 23rd March 1990

I've spent most of this week on the Blanking Driver, without making much progress. For Semicon West, I should be able to make the Blanking Driver generate adequate 500psec and 1nsec pulses, albeit swinging from -5.5V to 0V rather than -7.5V to 0V. Wider pulses seem to be stuck with a 1.5nsec "mezzanine" at -2V during turn-on, which is embarrassing, but not particularly important.

Andrew Dean and Paul Buggs and Paul Austin have spent a happy and productive week getting the "Waveform Processor - Digital" to work with the Trigger Board and the Delay board. The final stages involved Peter Milne as well. On Thursday afternoon they had the system running as a whole, starting with a processor-generated "Go" and running through a 64-element Delay List "m by n" times, doing "m" Subtract processing passes in the process and finishing with Subtract, Update1, Update2 and Zero sequence of processing passes.

Paul Buggs still has to satisfy himself that the arithmetic involved is being handled correctly, and we haven't yet exercised the "Closed Loop" data paths, but this is considerable progress, which should have been concealed from management to prevent, them getting over-confident.

No work has yet been done on "Burst Mode" image data transfer into the RAM Store. This is an independent can of worm-holes, likely to be quite tedious to get going.

The latest word from Surtech is that the revised Trigger Board should be completed by the end of next week.

Mike Rolfe expects the revised Timebase Interface Board to be loaded and ready for testing early next week; Bob Ward has volunteered to test it, since he will need it to test the revised Trigger Board.

The Plinth Control Card is now working, and all the revisions are now with PCA. We haven't yet got a proper image out of P2, and nobody has yet worked out why.

Chris Warner has got finally got back to getting images out of P1, once Trevor Sexton was able to provide some careful assistance (with a couple of cracked ribs, one tends to move very carefully). The working distance problem remains unsolved - Chris has a scheme which would work fine if we had autofocus, but is a bit tedious if you have to do your own refocussing.

Richard Adams has complained about the length of these reports; I suggested a speed reading course, but he says his problem is storage space rather than input bandwidth.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 30th March 1990

The last few days' work on the Blanking boards has been reasonably productive - I found I was wrestling with two problems that both appeared to make the output ring during turn-on and turn-off.

The first problem appears to have been that the row of grounding pins near the output end of the Blanking Driver daughter board were not actually making contact; by clamping down that end of the daughter board with an M3 bolt one source of "ringing" can be eliminated.

The other problem was the fine, high impedance track linking the Blanking Pulse output to the conjugacy test and offset input - this generated the infamous "mezzanine" by bleeding off about 20% of the Unblank Pulse for about 0.5nsec, then reflecting it back. I couldn't see the "grounding" problem until this track got accidentally broken.

When I eventually repaired the track, it appeared to reinstate the "grounding" problem - for the moment the track remains broken, and we don't have either Conjugacy Test or Blanking Pulse Offset. For this board, address Olff8402 should be set to 0827(hex) at all times to minimise dissipation in the offset generator.

The 200psec Blanking Board, plus Blanking Driver Daughter board, is now set up to deliver

1. A "400psec triangular pulse that only unblanks to -1.25V. The full width of the pulse at half maximum height (FWHM) is actually 900psec, and the width and size of the sampling pulse of electrons will vary dramatically with beam voltage.

Generated by setting address 01ff8400 to 1800(hex).

2. An 800sec rounded pulse, that unblanks to -0.17V. The FWHM is 1.24nsec.

Set address 01ff8400 to 2400(hex).

3. A "1.6nsec" trapezoidal pulse that unblanks to a solid 0V. The FWHM is 2.1nsec.

Set address 01ff8400 to 3400(hex).

4. A 2.4nsec trapezoidal pulse that unblanks to a solid 0V. The FWHM is 2.8nsec.

Set address Qlff8400 to 3800(hex).

5. Arbitrary pulse widths determined by the Trigger Board.

Set address 01ff8400 to 3c00(hex).

The two shortest pulses can be tailored to the beam voltage by changing a delay line or a bias resistor.

This should be adequate for Semicon West. It won't do for Samsung.

The Blanking Driver can probably be tweaked for greater speed - my last fortnight's tweaking has been vitiated by the problems that have come to light, but certain trade-off's have become clear.I suspect that a minor change to the Blanking Driver layout could allow us to restore Conjugacy Test and Blanking Pulse Offset. We will try for a new PC layout for the Blanking Driver as soon as possible.

The 200psec Blanking Board layout at the delay cables and around the GaAs parts needs to be refined - this might give us faster pulse edges into the Blanking Driver, which would also help.

I would plan on doing any further tweaking of the Blanking Driver board on one of Mike Rolfe's preproduction boards - I have been promised one for today, but it hasn't arrived from Surtech - and while I won't be tweaking in the immediate future, I will test the unmodified board as soon as possible to get an idea of the value (if any) of the tweaks on the current board.

The "grounding" problem can probably be solved by getting the right sockets onto the 200psec Blanking Board, and the right pins onto the Blanking Driver. The 0.635mm square pins specified for the Blanking Driver won't mate with the socket specified for the 200psec Blanking Board. The pins we have actually used on the Blanking Driver are Simon's 0.5mm round pins (part 227196) which are tinned rather than gold-plated. I've ordered what I hope is a gold-plated equivalent from Jermyn.

In the long run I expect that we will use the larger pins, but the corresponding sockets are not available ex-stock with gold-plated contacts.

Back in the real world, Peter Sherpherd is getting to grips with the "Waveform Processor - Analog" by slogging through the circuit diagram and the relevant data sheets. He seems undaunted.

Paul Buggs and Paul Austin have been continuing their epic bug-hunt on the "Waveform Processor - Digital". John Harrison has been called in to tinker with the software, several old mods had fallen off and had to be put back on, there is a problem with the Processing Pass handshake with the Trigger board, which currently means that the Trigger Board starts generating processing pulses before the "Waveform Processor - Digital" can use them, and the up-shot is that the arithmetic processing elements of the "Waveform Processor - Digital" are not yet working.

Bob Ward hasn't yet got a revised Timebase Interface to test - Mike Rolfe got the TaxiChip transformers for the board today, which I understand to have been almost the last of the shortages.

Since the Trigger boards are still stuck at Surtech, Bob will still be free to start testing the Timebase Interface on Monday.

The Plinth Control Card is still working; the outputs derived from the Penning gauge are now starting to make sense, which leaves Simon and Peter and Steven and Trevor free to concentrate on the Touch Alarm problem - if the column is driven down into the Touch Alarm plate, not only does the Touch Alarm go on, and with it the hooter, but the Column Z high limit also comes on, preventing the Column Z drive from driving the column up off the Touch Alarm Plate.

This unfortunate inter-lock can be undone by unplugging Cable 80, to the Alpha Repeater HV supply. The mechanics of this interesting syndrome have yet to be elucidated - but the cure will probably involve something totally unconnected, like the colour of the console side-panels...

Trevor and Simon have now got some rather attractive images out of P2, after working all Wednesday night. I am assured the images were not hallucinations brought on by sleep-deprivation.

Chris Warner has been digging the vibes on P1 (incidentally P2 is reputed to have less in the way of vibration) but I don't think he has formed any opinion on how they may be dug out.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 6th April 1990

According to my day book I have spent all this week sorting out and documenting the mods required on the Blanking Driver Board and the 200psec Blanking Board. There have been some distractions, but that was the bulk of the week, that was.

The mods are now in the system; if they don't get to Kevan soon I'll chase them.

The unmodified Blanking Driver boards arrived from Surtech today, along with Bob Ward's revised Trigger board. I'll have to do some remedial work on the Blanking Driver boards before I can use them; Surtech managed to fit the pin-strip headers, the output transistors, the two high-powered 50R resistors and the heat-sink up-side down. This is the sort of tribute to my nationality I can do without. There is now an additional mod in the system asking for extra detail on the assembly drawing so that only the very inattentive can do it wrong.

The only positive aspect to this cock-up is that since I'm going to have to pull out the pin-strip headers anyway, I can replace them with the gold-plated parts which came in from Jermyn yesterday.

Peter Shepherd has now got selected parts of the "Waveform Processor - Analog" into a working state. The fast Filter Grid Driver steps in about 15nsec, but rings a bit, while the High Voltage Filter Grid Driver steps in about 200nsec, and appears somewhat over-damped. We will have to look more closely on Monday.

I've set up a second "Waveform Processor - Analog" directory on Meth 3, as 854896-1, and have modified sheet 1 of the drawings to include input clamping and the consequent modifications.

Paul Buggs and Paul Austin have been having some success with the "Waveform Processor - Digital". They have used a counter to simulate the input from the ADC on the "Waveform Processor - Analog" and they have got sensible values out of a lot of the addresses in the Output Store, but not all of them. They have managed to find another missing pull-down resistor in their investigations so far, which solved one problem, but other problems remain.

Andrew Dean has managed to drag Yohannes Gebrihiwet (remember him?) back into debugging the Delay Board; Yohannes has been looking over the ECL PALs that run the board, and has detected a couple of possible faults - the first set of reprogrammed PALs stopped the Delay board dead, but the next set may do better.

Bob Ward is still testing the revised Timebase Interface - he has found a few layout errors, and one problem in his PALs, but there are more problems to solve before the board is fully debugged.

At the moment he is testing it by trying to drive the Plinth Control Card, and he isn't getting particularly frequent access to the system.

He has to have the revised Timebase working before he can start testing the revised Trigger board; there is also quite a lot of work to be done on the Trigger boards before they will be in a fit state to test - mainly missing components, but his heat-sinks have been put on up-side down as well.

The Plinth Control Card is still working; the problem with the Column Z has been transferred to the Mini-Stepper Board, and Mac is digging away there. He blames what appears to be a duff clock, but we don't yet know how or why it is duff.

The Column Z Limits now seem to be less eccentric - I think Simon found a piece of swarf that explained a lot.

P2 is now producing images routinely - which is to say that whenever it gets sufficiently debugged to get an image, somebody changes something, and the debugging routine starts all over again.

Chris Warner has been having fun with the images on P1. He has found a lot of non-causes of the "vibration" on the screen, and several causes - such the Ion Pump power supply, and the Extractor HV supply. No cures yet.

Chi Ping has organised another get together at 7.00pm on Monday. I should get to this one.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 12th April 1990

I finally got around to doing the remedial work on one of the new Blanking Driver daughter boards and plugged it into the 200psec Blanking mother board yesterday. The immediate effect was that I blew up an HXTR-2101 transistor (at £23.02 ). When I'd replaced the transistor and taken out the mod that that had blown it, the board proceeded to produce duff Unblank pulses, complete with mezannine. I'll get on with putting in the mods I worked out for the last board until we lose the mezannine, or until I can pass the problem over to Kevin Jackson (if he is going to be available in time).

Bob Ward has got the new Timebase Interface working with the Plinth Control Card - there were the usual assortment of minor drop-offs to correct rather than anything interesting.

The revised Trigger Boards are now being finished off by the technicians, and Bob expects to be able to start testing the board by the end of next week, if he can get access to a Sampling Crate.

Bob Taylor has got Peter Few assembling another Sampling Crate, which should help; although we have eight issue two Sampling Crate backplanes in hand, Mike Rolfe won't let us have any of them, and I had to rescue the third of the prototype backplanes from ATE, and Peter Few will have to put in the links to mod it up to issue two level.

Once this is available and wired up to one of Simon's new Advance Powerflex power supplies the pressure on the Sampling Crates may go down a bit, although with Peter Shepherd and Bob Ward and I all competing for the second and third Sampling Crates, life may not be entirely hassle-free.

I think I'd better get a third Extender Board made up.

Peter Shepherd is still working on the "Waveform Processor - Analog" - it doesn't look as if the DAC-63 is going to settle to better than 4% within 40nsec, which implies that Fast Closed Loop sampling will probably have to be limited to 10MHz, although the initial stages of getting the Expected Waveform into the roughly linear part of the S-curve could still use 25MHz sampling. The combination of the DAC-63 and the CLC-221 amplifier is even worse, but Peter has hopes of improving that.

I haven't got any further with up-dating the "Waveform Processor - Analog" circuit diagrams,

The news on the "Waveform Processor - Digital" is a bit happier. Pauls A and B have shown that with their counter simulating the Head Amplifier input, they now get sensible values out of all the addresses they write to in the Output Store. My impression is that this involved getting a better understanding of what the board is supposed to do, rather than getting the board to do something different, but this distinction is pretty academic.

Paul Buggs is going to try and document the latest set of mods to the board by next Thursday (when he goes off on holiday) then Paul Austin is going to make a try at getting Burst Mode working, which should be interesting. We should invite Paul Duesbury over from Syscom, and Dave Ward over from TDS, so that all three of us can accuse one another of getting it wrong, or congratulate Paul Austin on getting it right ...

Andrew Dean and Yohannes Gebrihiwet are a good deal happier about their second set of PALs for the Delay Board, and are now plotting further changes.

The revised Delay Boards have been completed by Printech, and are now waiting there for Mike Rolfe to appear with kits of parts and a purchase order on Printech to get them to load the boards - it has been decided that Surtech have gotten too expensive and too slow.

The problem with the Mini-Stepper Board has apparently been solved; Mac would very much like to know how he did it, but the decoupling capacitor on the Plinth Control Card which finally "solved" the problem didn't solve the problem the first time he put it on, so he must have found and fixed some other fault in the meantime. Rather reminds me of the Blanking Driver Board.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subjects Progress to 20th April 1990

I've done a little work on the second Blanking Driver board, and I've roughly halved the mezzanine - the first set of mods to the Blanking Driver board, strapping the component side grounds to the track side grounds, had no perceptible effect, and the second mod, to increase the resistance in the tail of the output transistors, made things slightly worse.

The third mod, which was to increase the resistance in the tail of the driver transistors, halved the mezzanine, but made the Unblank state unstable until I pushed up relevant base-stopper resistor from 18R to 51R.

Kevin Jackson will be here on Monday for up to four days to see what he can do. He is back out to the Middle East on Friday, so our financial exposure is strictly limited.

Bob Ward has now found that the new Timebase Interface works fine on an extender card, but falls over when plugged straight into the VME bus, which is a familiar sort of problem, and presumably soluble.

Eddie is now putting the last of the components onto a revised Trigger Board - apparently we have got everything except a trio of 18pF SMD capacitors (the 68pF capacitors came in today). Janine hasn't yet ordered them but when she gets back on Monday we should be able to get them ex-stock from STC.

The third Sampling Crate is now assembled, and is sitting next to the column on P2 in the lab. All it needs is a power supply cable, and we think one has been made up. I've made up the third Extender Card to go with it.

Peter Shepherd is still working on the "Waveform Processor - Analog". Last week's report was wrong - the DAC-63 on its own settles to 0.2% in 40nsec which is near enough to the spec, and only overshoots when you hook it up to the CLC-221 amplifier. The only plausible solution left to the overshoot problem is to set up the DAC-63 for voltage output, and use the CLC221 as follower with a gain of ten. This requires a massive cut-and~link, not least because it means swapping all twelve digital inputs to the complementary outputs of the ECL latches driving the DAC, but it ought to work (it took me a while to agree with Peter about that, but he has convinced me).

The slow, high voltage output from the TP-1464 isn't working either - it seems expensively willing to blow itself up. Peter is talking to Teledyne-Philbrick about this, but so far they are producing the reaction you would expect - we have got through to a real engineer in Boston, but he wants us to fax him the circuit diagram before he will react.

I still haven't done any more work on the "Waveform Processor - Analog" circuit diagrams.

On the other hand I've now up-dated the "Waveform Processor - Digital" circuit diagrams to include Paul Buggs’ latest set of mods, and sent a copy down to Bob Moore at GS Designs, with resistor numbers on all the additional resistors (most of the numbers got recycled, so there are actually about three new numbers).

Paul Austin is trying to get Burst Mode data transfers to work. So far he hasn't actually involved the "Waveform Processor - Digital" in the process, but it could happen any time now...

Andrew Dean and Yohannes Gebrehiwet had another session fiddling with the Delay board, and now feel happier about the board, though Andrew thinks that it falls over a bit more often.

In investigating this, Andrew found that he was getting more Trigger Edges than he ought, and discovered that the Sampling Crate wasn't actually earthed, anywhere, which meant that the trigger input on the Trigger board was seeing about six volts of common mode noise on the output of its grounded pulse generator, which is more than the input can handle (it won't blow it up, but apparently the input had seen larger voltages because one of the protection diodes had been blown up).

It seems to be time we started strapping everything to ground (for the Sampling Crate this means the column).

The revised Delay hoards are now expected to arrive from Printech, loaded, on the 11th May. Printech have now been sent our ECL flat-pack lead-forming tool. I hope they like it better than Surtech did.

I've had another discussion of the "Waveform Processor Digital" with John Harrison. I hope my powers of exposition are improving with practice - it is difficult to work out what I actually had in mind when I wrote some of the bits of the Waveform Processor specification.

(Note added 01/0/2017: What I'd initially asked for in the specification hadn't been practicable and Dave Ward and Bob Anderson at TDS had ended up putting together something that was simpler enough to be quick. We'd never done the kind of design review where I could have got a grip on what they had actually done, and edit the specification to get it to describe the board we'd had built.)

Chris Warner is contemplating taking the EBMF capacitative height sensor and using it to replace the touch alarm on the EBT - he has borrowed a set of height sensor electronics from E-Beam Module Test. Watch this space.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

f rom: A.W.Sloman

subject: Progress to 27th April 1990

Kevin Jackson came and spent three days on the Blanking Driver board; the major effect of his visit is that we now have two working and inter-changeable Blanking Driver boards for which the offset drive works.

On one board Kevin put back his surface mount inductor in the off-set path, and added a damping RC network. This left a little critically-damped ringing on the leading edge of wider pulses; the leading edge swings up to -0.5V quite rapidly (within a nanosecond or two) then rings down to -0.84V after 5.5nsec and up to +0.14V at 18.5nsec.

A larger inductor might let us reduce this, and a tighter layout might reduce the stray capacitance to ground, which should also help. When Dave King gets back from painting his windows we may be able to find our stock of surface mount inductors, and experiment a bit.

On the other board we put the off-set transistor directly onto the output track; this is free of any ringing, but the pulse amplitudes and shapes slightly poorer for pulses shorter than about 2nsec. A little surgery on the output track may help there.There is still some fiddling to be done.

Tom MacNamarra has up-dated layout for the 200psec Blanking mother-board - I've got to check the pen-plots, and tell PCA about the changes around the off-set circuit (which are minor, but significant).

I should be able to put together a package for the Blanking Driver daughter board late next week.

Bob Ward is still having trouble with the new Timebase Interface. It works fine with Delay board, even when plugged directly into the VME bus, but not with the Plinth Control Card; at the moment Bob is willing to blame the Plinth Control Card, and is waiting for the revised version of that card before looking for the problem again.

Eddie is still putting the finishing touches to the revised Trigger Boards. Today we got him to take all the red heatsinks off the ECL packages, and replace them with Gigabit Logic's 40A heat-sinks, mounted up-side down. The 18pF capacitors are now in and Nobby Parsons has had a couple of the TaxiChip transformers wound already and will get Doreen to wind the rest early next week.

Bob should be able to start testing the revised Trigger Board early next week.

Peter Shepherd has got the input side of the "Waveform Processor - Analog" working. He had to stop several of the CLC-110 buffers from oscillating - Kevan's layout and my checking of it were not brilliant - and the -2V reference for the AD-9003 was not quite right, but it sounds as if the rest of it was more or less okay.

The output side is still giving trouble - we don't seem to have got any further forward this week.

Paul Austin isn't doing any better with the Waveform Interface; he still hasn't been able to get onto the "Waveform Processor - Digital".

Paul Buggs has written a Spec Part B for the “Waveform Processor - Digital".

I look forward to seeing it sometime soon.

Andrew Dean has checked out the Advance Powerflex power supplies for the Sampling Crate, and they inject no detectable noise into the ground, beating the Powerline supplies by a huge margin - Simon made the right choice.

Simon Dawes and Peter Milne - with occasional assistance from Trevor Sexton - have been getting the Cursor Board to work. The latest version of the state machine PAL has compiled even as I write, and may have been tested by the time this gets read.

I've had yet another discussion of the "Waveform Processor - Digital" with John Harrison, where I revealed that 0000 in the Expected Waveform Store gives the most positive output voltage on the Filter Grid, and ffff give the most negative. John was quite polite about it, even though it is rather counter-intuitive.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 3rd May 1990

Since I'm going to spend the 4th May driving up to Glen Coe via Edinburgh, I'll defer any report on tomorrow's progress until next week.

I've done a little more work on the Blanking Driver board and I'm now confident that Kevin's approach gives us an acceptable board; replacing the 1uH inductor with a 10uH inductor, and minimising the stray capacitances from the offset transistor to the inductor, reduced the ringing transients by a factor of three, so that the worse case excursion is down to -0.25V. This seems likely to be acceptable - I want to measure beam current as a function of voltage across the blanking plates for several beam voltages, so I can put numbers on "acceptable".

The additional changes to the Blanking Driver will probably have to be put on a mod for PCA; I've up-dated my circuit diagram to cover most of the changes, but there is a day or so's work to tie it all off.

I did some work on the version of the Blanking Driver board without the inductor but it didn't get any better.

Yesterday I took myself off to the Analog Devices seminar at Bar Hill - it was not much different from the 1988 seminar; I'll be replacing our CLC-400 and -401 amplifiers with the Analog Devices equivalents AD-9617 and AD-9618 which are better and cheaper, and the DSP lecture reminded me that we could replace a lot of the "Waveform Processor - Digital" with the right DSP chip. The Analog Devices parts are a bit too slow to be the right chip, but the DSP-2101 has enough on-board RAM to hold the Accumulation Store, and enough adders and shifters to do all the arithmetic we need.

I still haven't got around to checking out Tom MacNamarra's new layout for the 200psec Blanking Board. This has to happen very soon.

Bob Ward and Peter Shepherd seem to have spent most of this week looking at the Valid CAE system.

Bob now has enough TaxiChip transformers to fully populate his Timebase Interface, and Eddie Newell has completed one of the revised Trigger Boards and we should start testing it soon.

Having got Eddie to change five heat sinks, we had to go on and get him to change eight conformable cables on each board - he had loaded the board with cables bought by production against our un-released cable drawings, and it turned out that our cable drawings had the male connectors in the boards and the female connectors in the backplane, whereas our prototype Sampling Crates have them the other way around.

Eddie ended up loading the Trigger board with my second set of prototype cables. I've changed the drawings, and sent all the production batch of cables back to the Quadrant Meter Company, with prints of the revised drawings. They will give us a quote for swapping the connectors any time now.

We will need the reworked cables to load Andrew's revised Delay boards when they arrive on the 11th May - we still have most of a second set of the old Delay cables, but some of them are soldered into the other Delay board, and they will be hard to unsolder, even with Gerrard's monster soldering iron, and Andrew really has to get both the new Delay boards working.

Peter Shepherd has found a crucial fault in the high voltage output on the "Waveform Processor - Analogue" - the sense input on the 16-bit DAC had managed to go open circuit, leaving all the other pins looking perfectly respectable. The board works much better at DC with the second DAC out of my stock of three. Watch this space for the high frequency response.

Paul Buggs and Paul Austin are moving data from the "Waveform Processor - Digital" to the Waveform Interface and the RAM Store. It is getting corrupted on the way, but at least they can start working out where it is getting corrupted.

The Cursor board is working (except when you spin the tracker ball flat out). The latest fault involved a DAC wired wrong way round - Peter Milne now swaps the DAC drive bits end-for-end in software, which saved Simon having to cut and link them on the hardware. Trevor Sexton has yet to give me a blow-by-blow account of the discovery and exploration of this fault; I'll probably be in a fit state to appreciate it on Tuesday, after a restful drive back from Scotland on Monday.

I had another discussion with John Harrison today, when I revealed another interesting fact about the data paths to the output DACs on the "Waveform Processor - Analog". John's self-restraint amazes me.

Andrew Dean is mapping the ground connections onto the EBT column; he is also discovering many interesting facts, and looking even more depressed than usual - the earthing seems to be constructed according to Sod's infallible law.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 11th May 1990

The changes to the Blanking Driver have been put on a mod sheet (D0110) and it has been signed by Richard and given to Kevan. The circuit diagram still needs a little more work, but I should be able to get that done on Monday.

I still have to get time on P2 to measure beam current as a function of Blanking Voltage at several beam voltages, but there is only a slight chance that the results I get will lead me to want to change the Blanking Driver layout again.

With my standards hat on, I checked the AD-9617 and -9618 against the CLC-400 and -401. Despite Analog Devices' claims, there isn't much between their parts and Comlinear's anywhere except offset voltage (3.3mV versus 13mV) and I don't think that it is worth the trouble to change over.

I've got a fair way into checking out Tom MacNamarra's new layout for the 200psec Blanking Board, and so far I've got two pages of notes. This is about par for the course. Again, I should be able to finish checking the board on Monday.

Bob Ward has been able to start checking out the new Trigger Board, with Steven Fisher. So far they have written successfully to all the registers, and today they got the 800MHz oscillator phase-locked to the 50MHz crystal - the level shifter wasn't working due to a minor flaw in the layout, but it works adequately (though nowhere near as well as it should) with the right wire link. There are still plenty of functions left to test.

Peter Shepherd has got more or less on top of the "Waveform Processor - Analog". The high voltage filter drive output is now working, and has been trimmed for critical damping. Unfortunately the settling time does not look good - around 1usec to 16-bits is the present estimate. Peter plans to convert the high speed filter output to a voltage driven follower with gain when he gets back next. Wednesday; we hope that this will give us 40nsec settling to 12-bits.

The quote for fixing the cables arrived last night, and we have given the Quadrant Meter Company an order number for doing the work. We hope to get at least the Delay board cables next week sometime.

Paul Buggs and Paul Austin are moving more data between the Waveform Interface and the "Waveform Processor - Digital". They haven't got the process completely debugged, but they seem to have got a long way down the road.

On Monday GS Designs will be told to finalise the revised "Waveform Processor - Digital" layout, and get us checked artworks as soon as possible.

Simon Dawes doesn't seem to have done any work on the Cursor Board this week; the column and console floppy drive seem to have kept him preoccupied. He and Trevor are planning on spring-cleaning the column over the weekend.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 18th May 1990

The Blanking Driver board (854804) is languishing in the PCA in-tray - it doesn't feature on the list of priority jobs in its own right, although we contend that as a daughter board of the 200psec Blanking Board (855034) which is on the list and can't be finished until the Blanking Driver is up-dated, the Blanking Driver shares the priority assigned to the 200psec Blanking Board. The case goes to the European Court in time for Semicon West 1993.

The changes to the 200psec Blanking Board got underway today; they have been with Kevan since Tuesday, but Tom McNamara was tied up finishing off another board.

Bob Ward and Steve Fisher are working their way through the revised Trigger board; the long Unblank pulse widths show a fairly consistent variation at around 5% of full scale for the 200usec down to 10usec ranges (33nF), rising to 15% on the l0usec down 0.4usec range (1.5nF) and about 30% on the 400nsec to 20nsec range (68pF), all of which is depressing - the pulse widths should be stable to around 0.1% in the short term at least, and we had hoped to solve the wobbly pulse width problem with the revised Trigger board.

My hypothesis is that I should have decoupled the substrate to -5.2V connection on the SD-214 DMOS switches that do the range-changing - I decoupled the gates with extravagant enthusiasm, but managed to ignore the substrate. Bob seems willing to get Steven to test the hypothesis by hacking the board a bit more.

An isolating resistor between the substrates and the -5.2V rail is desirable on other grounds; the substrates of the SD-214 transistors are also connected to their metal cans, and if you drop a ground clip onto the case of either of these transistors the power supply does its level best to pull 50A through the ground lead, which rather surprised Steven when it happened.

Peter Shepherd hasn't made any changes to the "Waveform Processor - Digital" as it has been tied up in SCUFI-week, He has been thinking hard about the changes that SCUFI-week has so far revealed to be necessary - like changing the fast DAC latches to edge-triggered types and replacing the CLC-221 that blew up. We think someone tried to make the CLC-221 drive a 50R input termination on a 2465 scope - the scope has a fast-disconnect circuit to protect the termination, but as is required by Sod's Law, it wouldn't be fast enough to protect the CLC-221.

I've have been thinking about a faster replacement for the TP-1464 in the high voltage filter output drive; the class-AB source follower output stage looks as if it is worth copying, and I think I can see how to drive it, but there is a lot of detail still to fill in.

The cables have all been sorted out, but won't get here until Monday - the Quadrant Meter Company wouldn't ship them out until they had received the written confirmation of the purchase order, and since the revised Delay boards didn't get here until yesterday, and won't get their shortages fixed before Monday, there didn't seem to be much point in hurrying things along.

GS Designs are about to start checking the layout for the revised "Waveform Processor - Digital". We will get a quote for the completed job on Monday, and I have to send them a set of the old artworks (or at least a copy thereof) by the end of next week.

Pauls A and B have had a quiet SCUFI-week, and found a few more bugs. Syscon will start on reworking the Waveform Interface board towards the end of next week.

Simon and Trevor seem to have got the column cleaned up reasonably well, although it took rather more than spring cleaning to find the bent liner tube, (it is claimed that it was bent before Trevor stood on it) and with Chris Warner's mu-metal shield on the turbo-molecular pump, P2 is said to be imaging quite well.

The Cursor Card is almost working - Simon found that it doesn't work at all with the user interface, but Peter Milne expects to be able to sort that out after SCUFI-week. Peter got rather terse about the "little creep across the screen" but it turned out that he was talking about the way the cursor drifts across the image, and rejecting the proposition that it was a software fault.

Peter and John expect to finish off SCUFI-week with a real waveform real soon now, but I've got to go off and buy food for the body.

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 25th May 1990

Tom McNamara has made some progress on the 200psec Blanking mother board, but nothing seems to have happened to the Blanking Driver daughter board.

Bob Ward and Steve Fisher have been preoccupied, and there has been no progress on the revised Trigger board. Bob Ward hopes to resume work on it next week.

The "Waveform Processor - Analog" remains tied up by SCUFI-fortnight; Peter Shepherd, like Bob Ward, has been somewhat preoccupied this week, and nothing has been done to the board.

My thoughts on the faster replacement for the TP-1464 high voltage driver have got to the point where I want to start drawing them, but I've found myself preoccupied by acceptance tests and development bottle-necks.

The reworked cables came in on Monday, as expected. The revised Delay boards were supposed to have been completed today, to go to Phil Buckle on Tuesday for a week on the Insite Tester. With any luck, Andrew will be able to get straight into the real problems on the board on Monday week.

GS Designs expect to have pen-plots of the revised "Waveform Processor - Digital" ready for our inspection next Wednesday, and photo-plots on Friday. We didn't get their quote until yesterday, but it doesn't look as if that is actually going to hold anything up.

Pauls A and B have had another moderately quiet week while SCUFI-fortnight kept the "Waveform Processor - Digital" and the "Waveform Interface" tied up. Paul Austin has been sorting out his PAL files for the Waveform Interface, and getting them into CMS at one coherent issue level. SCUFI-fortnight has thrown up some faults on the "Waveform Processor - Digital" and the Paul hopes to be able to get time on the boards to sort out these problems this week.

I put in some time with Trevor and Simon measuring net beam current as a function of Blanking Voltage at 500eV, 1.2kV and 3.0kV. It works better at low beam currents on a clean final aperture - while you are measuring net beam current at around the 50% blanking voltage the final aperture contaminates very quickly - so I want to remeasure the 500eV and 3.0kV results.

The preliminary results are moderately cheering; we only blank to about 0,03% (or 300ppm) but we got that at 5.0V of blanking at 3.0kV (although it took six volts after we had massively contaminated the final aperture).

The 1.2kV results that I more or less trust give me a blanking voltage of about -1.8V for a 50% beam current, with 90% at around -1.6V and 10% at around -2.1V, which implies that we should do rather better than 400psec FWHM on our narrowest pulse. Unfortunately, -1.8V for 50% blanking at 1.2kV implies -4.5V for 50% blanking at 3.0kV, where we actually saw 50% blanking at around -3.0V (intially) to -3.5V (after massive contamination of the final aperture) so we don't really know what is going on.

While these measurements were being taken Trevor and Simon checked on the kV compensation of the lens currents, and found that this stopped below 750V, which doubly confounds the 500eV observations. Peter is fixing the code any time now.

During the haggling about acceptance tests it became clear that we had to get the Metronics gratings and detectors working to meet an acceptable stage positioning spec, and it also became clear that Peter Milne wasn't too confident about getting the software working well enough to read the Metronics counter boards, and that while Trevor and Simon were confident that while they could eventually align the Metronics detectors with the Metronics grating, there was nothing they or Bob Taylor could do to prevent the detectors being knocked out of alignment within a few hours.

We now know that Heidenhain could sell us a robust and properly engineered version of the Metronics hardware for about 70% more than Metronics charge us, and that we could buy a Sony Magnascale system ex-stock for about 50% more. Both would offer much the same performance as Metronics claim, and interface through an RS-232 port. For the Sony system at least, we could also buy a cheaper parallel interface, like that offered by Metronics, which would decrease the price differential in production.

Simon and Trevor are getting the latest Plinth Control Card working; as usual they have changed the Penning gauge interface circuit. This time we have been able to make it a bit simpler.

I'm off to Italy for a fortnight - we fly out Sunday morning, and back on Saturday the 16th. For Anne it is one week of psycholinguistics workshop and one week of playing tourist - for me one week of holiday and one week of playing tourist.

(Note added 2012-10-12. The Metronics stage positioning gratings had been the Achilles heel of the Lintech EBT – the detectors were always getting knocked out of alignment – and getting rid of them on the Cambridge Instruments system made everybody a lot happier. Graham Plows doesn’t seem to have been in the habit of talking to his service engineers and probably didn’t realise how bad the Metronics system was. Trevor Sexton and Simon Dawes had made it very clear to me, and anybody else who was ready to listen. Richard Adams was a bit surprised by my interest in this aspect of the system, but got the message very quickly.)

to: Richard Adams, Bob Ward, Yohannes Gebrehiwet, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 15th June 1990

Jack Warner has checked the 200psec Blanking Board layout, but nothing has happened to the Blanking Driver board, Kevan expects to get onto it in a week or two.

Steve Fisher has tried to do some work on the revised Trigger board, but spent most of his time finding a failed TaxiChip.

There has been some progress on the "Waveform Processor Analog" - Peter Shepherd has finally done his mods, but as of this afternoon it seems that he wasn't too happy with the results.

I've finally modified sheet one of the circuit diagram ("analogl" on Metheus) to include all the changes I'm aware of; Peter has his own mods, which are largely confined to sheet 2.

I've also roughed out a possible replacement for the TP-1464 high voltage amplifier; about all I can claim for it at the moment is that it ought not to blow up, and it might be fast.

GS Designs turned out not to have pen plots of the revised "Waveform Processor - Digital" when we went down there this afternoon; they will send them to us early next week, and the Pauls will have the dubious pleasure of checking the tracking of the critical timing paths.

Paul Austin has actually had Burst Mode data transfers from Waveform Processor to RAM-Store this week, and has been able to get the Simulation mode going quite reliably. It looks as if there is something loose or otherwise defective in the TaxiChip link, and it is to be hoped that the problem isn't fundamental.

I did a bit more work chasing linear encoders this week; both Heidenhain and Sony encoders are in use in our machine shop, and both work fine. The parts we want are available ex-stock, and all that is now required is a decision and a signature for nearly two grand's worth of bits.

I was very happy to hear that the Sampling Crate finally picked up a real signal from a real specimen while I was off in Italy, and even happier when it did for the Leica big-wigs on Wednesday; I'm less happy with the difference this revealed between my estimate of the lag around the system (around 40nsec) and the lag Andrew actually measured (about 120nsec).

Some of the additional lag - about 20nsec - was in over-long cables, but the biggest chunk of the difference was in the transit time of the electrons down the column, from blanking plates to specimen, which I seem to have completely ignored, while the rest was the propagation delay through to the Waveform Processor - Analogue, which I had merely grossly underestimated.

Page 2

Dave Ward will be able to tweak the relevant time delay generators on the Trigger Board to generate the longer delay required between unblanking and sampling, but in the short term this will limit us to a maximum sampling rate of 16MHz. We could get back to 25MHz by replacing the three AD9500BQ delay generators in 24-pin DIP packages with six AD9500BP devices, which come in 28-pin PLCC SMD packages, and could fit into the same area, but Bob Ward is looking for a more elegant solution.

There is a similar, albeit less difficult, problem with the delay between the Unblank pulse and the Convert edge, which initiates a change in the voltage on the filter grid; I originally asked for a 0nsec to 10nsec range, and it now looks as if we need something more like 20nsec to 40nsec.

Paul Austin has started in on getting the new Waveform Interface to work; first he had to get a new LIP going, which he has now managed, but the Waveform Interface is still being difficult about giving him a TaxiChip link, so there is a fair way to go yet.

The holiday in Italy went much as expected - I got to find out that Italian dentists seem to make a standard 50,000 lira (£24 ) charge for emergency treatment and that Rome is infested with incompetent juvenile pick-pockets. My wife thought it was all splendid, and I'm not going to disagree.

(Note added 2012-10-12. The difference between my estimated propagation delays and Andrew Deans’ measured values really was very embarrassing, and we never did get to rework the time delay generators. The AD9500 delay generator chips weren’t as good as they should have been – they were essentially digitally programmable monostables, and getting the digital data into the package introduced a lot of noise from the digital power supply connections, which made them jittery, so having an excuse to get rid of them was nice, but we weren’t really in a position to do the job right.

If we'd thought harder about what we actually needed to do, we'd probably have ended up with a digital solution, counting 200MHz clock edges with a 100136 ECL synchronous counter, which would have given us 5nsec granualarity, which would have been good enough, but I was focused on analog solutions.

Presumably I'd consulted what I'd written into my day-book back in 1988 before confessing to have forgotten about the primary electron transit time. It's an odd kind of mistake for me to have made, because I was well-primed on electron transit times – part of the justification for my 1984 patent on “charged particle deflection” was that lower energy electrons travelled slowly enough that it could take them longer than the unblank period to traverse blanking electrodes that were long enough to divert a higher energy beam

A 1kV electron travels at 18,000 km/sec, about 6% of the speed of light, so the primary electron was going to take about 30nsec to get from the blanking plates down to the specimen. The secondary electrons were dragged back up to the “through the lens detector” by smaller electric fields, so they might have travelled half as far at perhaps a third of the velocity, and there's another 30nsec of transit time through the photomultiplier tube (which is specified in the data sheet which I'd read rather carefully – in my capacity as the in-house expert on photomultiplier tubes - and seems to have allowed for). The best excuse I can come up with for having forgotten about the primary transit time that I'd been rushed off my feet at the time. The message that the electron transit time down the column could be significant can't have made it into any part of my brain that was in a position to do anything useful with it.

Mostly when I made that kind of mistake, I'd wake up in the middle of the night a day or two later thinking about the subject, and realise that I'd failed to deal with whatever it was, but at that time my brain must have been busy reviewing other stuff.)

to: Richard Adams, Bob Ward, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor Chris Warner, Paul Buggs, Chi Ping Luk, Peter Shepherd

from: A.W.Sloman

subject: Progress to 22nd June 1990

Andy Chappell has completed the mods to the Blanking Driver Board, which means that Tom McNamara can finish off the 200psec Blanking Board.

Bob Ward hasn't been able to do anything significant on the revised Trigger Board this week, and neither he nor anybody else seems to have done any work on the revised Timebase - at least Andrew Dean is using the revised Trigger board to test the revised Delay boards.

Both the P2 column and the Sampling Crate are being driven by the bodged versions of the original Timebase Interfaces; as soon as we are sufficiently confident of the revised Timebase Interface we should modify the cabling for the new board, and hope to lose some of the idiosyncrasies of the original board.

Peter Shepherd has made a lot of progress with the Waveform Processor - Analog. He is in the process of passing marked up circuit diagrams to PCA to get the revised version laid out. I've got to up-date the second sheet of the circuit diagram on Metheus to reflect his changes. The revised board is not going to be capable of driving the column to meet the original specification - the fast low-voltage Filter Drive is close enough to specification that I'd say that we should leave it for more urgent problems, and while the high voltage Filter Drive is about a factor of five too slow, the original 5MHz sampling specification was based on what we might achieve, as opposed to any particular target that we had to achieve.

The Waveform Processor - Digital should now have been plotted at GS Designs; the pen plots were supposed to get to us today, but they haven't arrived yet. The last mods and the corrections to errors revealed by GS Design's checking have been put onto the Metheus circuit diagrams - six have been plotted out and one remains to be done.

The Waveform Processor - Digital artworks are now at Printech, waiting to be turned into a board; yesterday we found another error in the Waveform Processor - Digital circuit design, which explained why we can't reduce "m" to one for the fastest possible data acquistion. Unlike most system design errors, it is fairly easy to correct - only six tracks have to be moved on one layer of the board, and they don't have to be moved that far. Bob Moore is busy moving them at GS Designs, and Printech are going to get four revised prints on Tuesday morning so that they can make the corrected layer before they laminate it with the seven unchanged layers.

CLoopIWeek seems to be producing interesting results; at the moment it looks as if we might not be feeding back exactly on the point where we sample, which is a fairly high level sort of error, compared with not sampling or not feeding back at all, but still sufficient to need fixing.

Paul Austin has reached much the same sort of state with the revised Waveform Interface (and quite rapidly too). It steps through all its states, and transfers data, but the data gets messed up after a while. Paul fears that the new crate, rather than the new Waveform Interface, may be at fault, and is going to do some board swapping to see if he can pin this down.

This morning Simon Dawes pointed out a fault in my part number application for the coaxial inserts for the mixed D-type shells - I'd mixed up plug and socket. I'd got it fixed by lunchtime. Is this a record?

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor, Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 29th June 1990

I have signed off the artwork for the Blanking Driver daughter Board, but Andy Chappell still has to do the assembly drawing, which is going to keep him busy for a while.

Tom McNamara seems to have started to change the 200psec Blanking mother board to match the revised daughter board; he didn't expect the changes to take long.

Bob Ward has had the original Trigger board modified to put the Encode and Convert edges in the right place, with enough delay to cope with the actual delays on the column, as opposed to my half-baked predictions. Bob Ward and I have worked out how to get the sampling rate back to 25MHz on the next revision of the Trigger board using either seven AD-9500 programmable monostables or four Bt-605 programmable monostables, and we are waiting on data from Motorola on their MC100E195/6 parts before coming to a final conclusion.

Bob has been able to get back to testing the revised Trigger Board; the TaxiChip read-back isn't working reliably yet (probably a dry joint or some other duff connection) so we still haven't made any progress in eliminating the jitter in the long Unblank pulse widths (above 20nsec) or in reducing the noise on the Trigger and External Clock inputs.

The revised Timebase Interface is now being used to drive the sampling crate which Bob and Andrew are using to test the revised Trigger and Delay boards; so far it seems to be working reliably.

Andy Chappell has started work on up-dating the layout of the Waveform Processor - Analog, and I have started work on putting Peter Shepherd's modification onto the Metheus circuit diagram; mine should have been a trivial task, but I caught a bad case of creeping perfectionism, and I've spent about a day calculating values for two extra resistors, and for new resistor values in the optional divider, where I want to move one of the resistors. Today's aberration is to chase up precision metal-film resistors in surface mount packages, to help the tolerance build-up.

Paul Austin and Paul Buggs have already rendered the layout obsolete by putting in another PAL change; this seems to be bringing the Waveform Processor - Digital perilously close to working with John Harrison's software, but it isn't quite there yet.

The PAL change uses up the last uncommitted output on the state machine PALs. There are two uncommitted and unconnected PALs on the board against the next change, but we would probably be better off going to the ATMEL V750 PALs which are pin-for-pin replacements for the 22V10's we use, but with eight extra "buried" registers. The ATMEL devices may not be fast enough (35nsec is the fastest available ex-stock, whereas we are using 25nsec 22V10s) and ATE would have to pay 500 pounds to get the device model up on ANVIL to generate their test vectors, but they are probably worth looking at.

Chris Warner has been measuring things on the column, and seems to have been able to get the same result twice, which is a step forward; he has also got both the new scintillator material and the special compound for polishing it, and as soon as we can work out who is going to pay we are going to get some new scintillators made up. It would probably be excessive to say that progress is mired down in bureacracy, but I've been saving up the phrase for years, and I probably won't get another opportunity to use it.

Trevor Sexton has returned from Greece, and expects to have recovered from his relaxations by the end of next week.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 6th July 1990

I haven't seen the assembly drawing for the Blanking Driver daughter board. Andy Chappell has started on revising the layout for the Waveform Processor - Analog, but he says that he is going to do the assembly drawing for the Blanking Driver next week.

Tom McNamara and Jack Warner have been checking the 200psec Blanking Driver layout, so I should get that for signing off soon.

Bob Ward has sorted out the Taxichip read-back on the Trigger board, and has got the Trigger and External Clock inputs going - Surtech put the 50R high power terminating resistors on upside-down, which was unhelpful (the back is metalised and you see a dead short) but it was easy enough to get that right. The high impedance trigger input is just as noisy as before, but Bob is going to make sure that all the other functions are working before he puts in time on tracking down the noise - it could be a long job - and I may end up putting in some time in on the trigger problem if Bob gets too tied up.

We still haven't got data on the MC100E195 delay generator as a candidate for the second revision of the Trigger board - Motorola has claimed that the data is being faxed from Germany now, but it hasn't got here yet.

The Waveform Processor - Analog circuit diagram is now up-to-date and there are film plots in the hanging file. I think I mis-calculated my extra resistor values but I've recalculated them with a view to putting in precision resistors, and I guess I can ask Pete Shepherd to repeat my calculations, to see which, if any, are right, before we order several hundred pounds worth of precision resistor.

The last minute changes to the Waveform Processor - Digital seem to have gotten through to Printech - at least we haven't been told that they didn't get through.

The revised Waveform Processor - Digital boards will get here from Printech next Wednesday. I've marked up a copy of the system 38 parts list for the board for Mike Rolfe, who may get around to kitting the board once system 38 is more or less right. We really ought to go over the revised artwork to make sure that we have got 50R terminating resistors on buried ECL lines, and 75R terminators on the ECL tracks confined to the surface of the board - there are roughly 350 resistors to check.

The residual problems in getting the original Waveform Processor - Digital to work have been attributed to the original Delay board's tendency to skip samples from time to time — this is a sufficient explanation of the troubles we were seeing, and on the strength of it Andrew Dean is now concentrating on debugging the revised Delay board, which seems to be coming on.

Paul Austin has got the Ram Store working in loop-back and simulate modes; there was a track missing on the back-plane, but correcting that got everything to behave. Next week Paul is going to have another try at the fault on the Dual Port RAM card, and may get around to trying to link up to the Scan Generator.

Chris Warner's new scintillator material is going out to be made up early next week; the bureaucratic mire was less of a hinderance than I had feared.

Chris and Trevor and Simon seem to have spent a week finding out that the column on P2 is bent, twisted, and uncooperative. They are trying an exorcism next week.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 13th July 1990

I still haven't seen the assembly drawing for the Blanking Driver daughter board — a couple of the photoplots had to be redone, and Andy is putting off the assembly drawing until next week, when he will have corrected photoplots to work from.

I've signed off the photo-plots for the 200psec Blanking Board, and marked up the system 38 parts list for Mike Rolfe. I think I've still got an assembly drawing coming.

Bob Ward has put in some more work on the Trigger board; the Convert Edge output is working and he can generate single Encode edges with controlled delay, but we can't yet get multiple Encode edges - Bob has replaced a GBL10G021 D-type which had blown an input, but we don't yet know if this has solved the problem.

The Convert Edge has not yet been modified to trigger off the trailing edge of the sampling pulse, and the Encode Edge has yet to be modified to give a maximum delay of 150nsec.

We still haven't got data on the MC100E195 programmable delay generators; Motorola claims to have made two attempts to fax the data from Germany, and we are now waiting for the same information to get here by post.

Peter Shepherd has recalculated my precision resistors values for the Waveform Processor - Analog, and found a small error (0.13%). It doesn't change the values of the precision resistors we want.

I've looked over the input side of the board, and it seems that we could use some precision resistors there too; I've worked out a set of values, and written up a justification - all I've got to do now is to add intelligibility, and update the circuit diagram again.

The revised Waveform Processor - Digital boards didn't arrive on Wednesday; Printech are now promising them for Monday. Mike Rolfe has got the System 38 parts list for the board up-dated, and the board is now being kitted. We really do need to check the revised parts list against the revised layout, and now that I've got over my cold I've probably got the strength to try to dragoon someone else into doing it.

Paul Austin has gotten started on trying to get Burst Mode transfers going between the original Waveform Processor - Digital and the revised Waveform Interface. He has got to the point where he gets a few pixel's worth of Burst Mode transfers before the system hangs up waiting for an SLC (Sampling Loop Completed) signal. He feels a bit dour about this, since he started the week on a high note, by getting rid of the last of the intermittent Refresh clashes on the Dual Port RAM card - so we now have a Dual Port RAM card fit for software. Now that Peter has got his souped-up Syntel boards he doesn't actually want to put programs there any more, but it is nice to have an incorruptible Image Store.

Andrew Dean has had an exciting week on the revised Delay Board, proving that by the time an 800MHz clock pulse has gone past the clock input of a 10G061 synchronous counter, it has lost half its amplitude and looks very tired indeed. On the Delay board - where he starts off with a full GaAs logic swing - this is a manageable problem. This effect probably explains a lot of our difficulties with the 800MHz clock on the Trigger board.

Chris Warner and Trevor Sexton have got the column unbent. It is still horribly astigmatic, but presumably this will be the next problem to be knocked over.

The Sony Magnascales have arrived, and Peter Milne has started in on getting the RS-232 link working; when they work the scales get bolted onto the stage.

I haven't got anywhere with my spec part B for the Blanking Driver - for some reason I spent a couple of days this week writing out a proposal for an EBT optimised for examining specimens with a pattern repetition rate from l0MHz to about lGHz. I can't imagine what sort of customer would buy it, but it cleared my head of some interesting ideas, and next week I should be able to get back to concentrating on the boring old Blanking Driver.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner, Paul Buggs

from: A.W.Sloman

subject: Progress to 20th July 1990

I haven't had anything out of PCA recently – Andy Chappell has finished relaying the Waveform Processor - Analog, and Peter Shepherd has looked over the changes, so that should be going out soon. Tom McNamara is expecting the photo-plots for the 200psec Blanking Board next week, and we will put together a preliminary sort of assembly drawing then.

Bob Ward has put in a fair amount of work on the revised Trigger board this week; the multiple Encode Edge generator looks as if it would work if we could get the 800MHz oscillator going properly; Bob has improved it a fair bit, but we are trying to drive 10G061 GaAs synchronous counters, and Andrew Dean's experience on the Delay board suggests that the 10G061 clock input is a really nasty load. The next step looks like exploiting the unused half of IC38 to buffer the 10G061s.

We finally got the data on the 100E195 programmable delays from Motorola; a brilliant device, but the maximum delay span is 2.2nsec - we would need about 30 to generate the range of delays we need. While we were waiting for that data, we also got data on the Brooktree Bt622/624 parts, which work on much the same principle, but offer a delay range from 50nsec to 160nsec in a single package – since this represents 100 successive delay cells, 25Mz sampling is no problem (the circuit could probably handle 100MHz sampling). I believe Bob is planning on ordering a few.

I've written out my orders for nineteen different value precision surface mount resistors for the Waveform Processor - Analog; they add up to £690, and I've also ordered ten AD-96l7 really fast amplifiers for the same board, which adds another £150.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner, Paul Buggs

from; A.W.Sloman

subject: Progress to 27th July 1990

I've up-dated the circuit diagrams for the Waveform Processor - Analogue, Mark 2 to include the last changes during the re-layout, and changed the terminating resistor symbols on the diagrams to the style used on the Waveform Processor - Digital circuit diagrams; Andy Chappell and Jack Warner are now checking the revised layout against the up-dated circuit diagrams, and I'll archive the circuit diagrams as soon as we finish checking and reconciliation.

I've set up a separate directory on Meth3 for the circuit diagrams for the Mark 3 version of the Waveform Processor - Analogue, and I'll put in the changes we know about already some time next week, if I can get time on Meth3.

The orders for the precision surface mount resistors and the op amps for the Mark 3 board are still languishing in the bureaucratic mire - Richard got Andrew Dean to vet them just before Richard went off for his two days holiday, so we won't be able to start getting Graham to sign them off before next week.

Bob Ward has had Eddy Newell put in a day or so's work on the revised Trigger board, putting in the mods to get longer delays on the Encode edges, to move the Convert edge to the other end of the Sampling pulse, and to route the 800MHz clock through the unused half of IC38 (a line driver). Mike Penberth was away today, so Bob has been able to check out the performance of the modified circuits - both the changes to the 800MHz clock and the changes to the Convert edge generator required further tinkering to get the desired result, but they seem to be okay now, although the 800MHz clock seems to be being modulated by some 400MHz interference (as opposed to 50MHz on the original Trigger board).

Andrew Dean has had a mildly frustrating week, initially wrestling with the Taxichip links between the revised Delay board, and the revised Timebase Interface. The Timebase Interface Taxichip receivers were losing the high byte of data read back from the Delay board, apparently because the high byte receiver was one of the very old 70MHz parts, while the low byte receiver was a 125MHz part; once discovered, this was corrected relatively easily, though not as easily as if the part could have been mounted in a socket.

Once the Taxichip link was working, Andrew was then in a position to find out that the Trigger Detector on the revised Delay board is just as cranky as the Trigger Detector on the original Delay board. So far he hasn’t been able to work out why.

The revised Waveform Processor - Digital boards didn't arrive until Wednesday this week; Printech messed up the silk-screen and had to strip it off and put it on again right, which took another day or so.

Mike Rolfe has had the board kitted, but despite our best efforts it got kitted to the old kitting list, which apparently doesn't get automatically up-dated with the parts list. The board is now being re-kitted to the revised parts list; Mike found one part (the l5MHz oscillator) where I'd failed to put in the part number, but we had raised a part number and we found it in a couple of minutes.

Mike has at long last found someone to assemble the board - Avantel at Melbourne - but they want the assembly drawings, and Kevan hid them before he went off, and he won't be back until Tuesday (and then only for ten minutes).

I still haven't found the strength to dragoon someone else into checking the revised parts list against the revised layout - maybe we should try to get PCA to do it?

Paul Austin has made quite a lot of progress in getting Burst Mode transfers going between the original Waveform Processor and the revised Waveform Interface in the RAM Store; he has transferred full frames up to 32 pixels deep, although the process doesn't always work, and the first two frames get trashed and stay trashed (probably because one of our many pipe-lines isn't starting where it should). When the process does work, it appears to work perfectly, without errors or drop-outs, which is decidedly pleasing. Of course, it is very much slower than it ought to be – some minutes as opposed to 40 seconds - which is puzzling.

Last week's missing SLC signal turned out to be an intermittent Global Go - in Burst mode the Waveform Interface sends a Global Go to the Timebase Interface to kick off the Delay boards, and the revised Waveform Interface sends a shorter pulse than the original Timebase Interface can reliably detect. Paul has temporarily modified the relevant PAL on the revised Waveform Interface such that all but the first Global Go is extended, so that once a Burst Mode transfer is initiated it reliably runs to completion.

Chris Warner and Trevor Sexton may not have cured the astigmatism in the P2 column, but they now have a prime suspect for the source; the scan coils were inexpertly wound, and - in particular - the sides of the outer scan coils which should subtend an angle of 120 degrees to the column axis, come very close to 180 degrees. The stigmator coils had been wired up wrong, as well.

Chris Warner has vowed (in the best traditions of heroic fantasy) to correct every drawing involved all the way to production, which may keep him busy for some time, once he gets back from his fortnight of holiday, but he stands a fair chance of eventually exorcising at least part of the very real (and malignantly evil) problems that we get with the column.

Peter Milne is well on the way with the exorcism of the stage positioning; he has got an RS-232 link going from the Syntel to the Sony Magnascales; next week the Magnascales go on the stage.

I've written a large chunk of my spec part B for the boring old Blanking Driver board, and there really isn't that much left to do - mainly filling tables of inter-connections. In the best traditions of documentation, writing up what Kevin Jackson and I had done, and why, gave me a clearer insight into the problems of the board, and I think I can see a change that might speed it up quite a lot, and will save £75 worth of parts into the bargain; I've complete a circuit diagram for the exciting new Blanking board (on Meth2) and I have sketched out a layout. So far it looks practical — we should be able to make the revised board so that it plugs into the existing 200psec Blanking board (although we would have to change one resistor, replace another with a wire link, and delete a zener diode, none of which qualifies as a cut or a link).

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner

from: A.W.Sloman

subject: Progress to 3rd August 1990

Apparently Jack Warner and Andy Chappell have finished checking the layout for the Mark 2 version of the Waveform Processor - Analog; I haven't been told that the artworks have been signed off yet, so I haven't had the Mark 2 circuit diagrams archived yet.

I've up-dated sheet l of the circuit diagram for the Mark 3 version of the board, and I should be able to do the other sheet next week. The precision resistors for the Mark 3 board still haven't been ordered, but Richard has promised to deal with them today.

Bob Ward has finished testing the revised Trigger board - all the functions now work. I'm going to put in some time on the performance of the long sampling pulse generator and the high impedance trigger and external clock inputs – they are all a bit noisy, and it looks as if some analog tinkering might improve things. So far I've replaced IC28, and washed out a flux bridge that was leaking current, but I haven't got anywhere with the noise.

Bob is going on to sketch a design for an Encode delay generator based on the Brooktree Bt-622 or -624 parts; if it looks practical we will be ordering some - they are on 6 to 8 weeks delivery at the moment, so we will have to order them fairly soon if we want to have a Mark 3 Trigger board tested by November.

Andrew Dean has made a quantum leap forward this week – the mysterious problem with the Trigger Detector on the Delay board turned out to be another of Gigabit Logic’s almost-ECL

compatible parts. The l0G02l dual precision D-type bistable doesn't have a Vbb threshold-setting input to allow you to set its logic threshold to track 100K ECL logic, and our ECL-generated Clear signal turned out to be marginal. The l00K logic "1" level turned out to be only just higher than the l0GO2l's logic threshold, so that the Clear input took a very long time (many nanoseconds) to get de-asserted. When Andrew buffered the ECL signal through a GaAs gate, the problem went away.

The same mod should work on the original Delay Board, and ought to make it reliable enough to let us get on with testing the Waveform Processor - Digital. Andrew has executed the modification on the old board, but isn't sure if it is working yet.

Needless to say that there are more problems to be solved on the revised Delay board. Andrew is on holiday next week, but no doubt he will return refreshed the week after next, for a week of concentrated effort before his next week of holiday.

The revised Waveform Procesor - Digital should be assembled by Avantel at Melbourne the week after next. They expect to give us a price on Monday, both for the Waveform Processor - Digital, and for the 200psec Blanking board, which will probably be next in the queue. Mike now has a complete kit for the 200psec Blanking board, including the board itself, which arrived this morning.

We haven't actually ordered any of the matching Blanking Driver boards, but that misunderstanding seems to have been resolved.

The parts list for the Waveform Processor - Digital is still unchecked. Somehow I've got to get it done.

Paul Austin has made more progress with the Burst Mode transfers; he has now had the Waveform Processor - Digital adding to the pixel data before it gets sent back to the RAM Store, and he has got the process running at the right speed - 32 frames in 30 seconds.

Peter Milne has got the movie mode going, so we can exploit the Burst Mode as soon as we get the sampling right.

Paul Austin was distracted from Burst Mode by Peter Milne's scheme to move all the data blocks in the Sampling Crate, to make a contiguous memory space for his extended (or is it expanded?) memory on the Syntel. Paul had to reprogram the decoder PALs on the Waveform Interface, the new Timebase Interface, and the old Timebase Interface. The old Timebase Interface came as a bit of a surprise, but that too is sorted out now.

Chris Warner is away on holiday, and Trevor Sexton is away in Korea. The lab seems more peaceful - just the intermittent cracks as the head-amplifier board flashes over. Simon seems to be working on keeping up the flow of crises in the absence of both Chris and Trevor.

The Magnascales didn't get on the stage this week – Bob Taylor is going to put them on with the new (ground) bal1-screws, and wasn't saying quite when this would be.

I've got a good bit further with my spec part B for the Blanking Driver board. It isn't finished yet, but next week had better do it.

It looks as if I am going to the 3-Beams Testing Symposium in Japan on the 5th and 6th December, and going on from there to Australia, home and beauty (I'll leave out the Australian expression denoting beauty) on the 7th December. This won't get me as cheap a trip home as my wife has gotten herself, but it strikes me that the company is being distinctly helpful. I may even work some unpaid overtime out of sheer gratitude.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner

from: A.W.Sloman

subject: Progress to 10th August 1990

We should have the artworks for the Waveform Processor - Analog Mark 2 next Monday. The circuit diagrams have been archived - but only because Andrew Nightingale archived the

wrong directory.

I've up-dated sheet 2 of the circuit diagrams for the Mark 3 version of the board, which should end my direct involvement. Bob Ward and I have worked out that Peter Shepherd should be through with the Mark 3 board around Christmas, which gives him something to look forward to.

The purchase requisitions for the precision resistors for the up-grade to the Mark 2 board, and the Mark 3 board, finally went off to Purchasing today. The resistors should get to us in time for the Mark 3 board.

I've spent most of this week on the revised Trigger board, tinkering with the long sampling pulse generator. The jitter on the long pulses is now down to about 0.3% of full scale, 0.5% of the shortest pulse within each range, and by tightening up the layout we can probably do appreciably better - there is some 10mV of 25MHz and 5MHz clock noise between the ground pins on either side of the long sampling pulse generator, which we should be able reduce by slotting the ground plane in the right places.

The short sampling pulse generator is showing leading edge jitter - but no trailing edge jitter - on its output, so it is due for some attention next week.

Bob expects to start designing the new Encode delay generator next week; this week got lost to Mike Penberth and the new CAE system.

Andrew Dean's great leap forward last week hasn't done anything for us this week. Paul Austin and Peter Milne have been pre-occupied with getting Burst Mode working, and incinerating old RAM Store back planes, and the improved Delay board has remained untouched and untested, which is rather frustrating.

The revised Waveform Processor - Digital should be assembled by Avantel at Melbourne by the end of the week after next; this represents a week's slippage on last week's estimate. They won't now start working on the board until next Wednesday, and they now expect to take more than a week to get it fully loaded.

This gives me another week when I could usefully check the parts list for the board against the artwork. Somehow I don't think I'll get around to it.

The 200psec Blanking board will be loaded at Avantel at the same time as the Waveform Processor‑Digital, and we should be getting the bare Blanking Driver boards back from manufacture roughly when we get the loaded 200psec Blanking board from Avantel.

Paul Austin and Peter Milne have had a 64-frame "movie" running, and when it runs it runs very well. Paul has been hard-pressed to work out why it drops out; he recently found that the fuse-holder on the Waveform Interface was erratically duff, and drops the +5V on the board to +4V from time to time. This explains some of the problems they have been seeing, but soldering the fuse into the holder hasn't cured all the problems.

Simon has finally tracked down the last of the faults in the cables linking the stigmator coils to the console, and has produced some nice-looking images.

This week I haven't done anything on my spec part B for the Blanking Driver board; as soon as I get pitched off the Timebase crate I guess I'll get some more done on the specification.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner

from: A.W.Sloman

subject: Progress to 17th August 1990

The artworks for the Waveform Processor - Analog have come back and Peter Shepherd has signed them off. Andy Chappell has given me marked up versions of the circuit diagram used to check the board, and I'll up-date the Mark 2 circuit diagram on Meth 3 and archive it next week (Andrew Nightingale has retrieved the Mark 2 circuit diagram from the archive).

I've spent most of this week on the revised Trigger board, mostly writing up last week's work on the "long" sampling pulse generator. I got onto the "short" sampling pulse generator yesterday. So far I've replace IC53 - a Gigabit Logic 10G002-3C line receiver/comparator at £33.75, one of whose inputs had gone leaky - and changed C48 to 100pF. The pulse widths now run down from 44.lnsec to about 2 nsec in an almost continuous series, but I've still got 600psec of leading edge jitter on some ranges, so there is still work to do.

Bob did rather less design work on the new Encode delay generator this week than he had hoped to - Mike Penberth has been haunting him with strange additional tasks - but we have ordered four of the Brooktree BT-624 quad delay generators, which is a start.

Andrew Dean's great leap forward (see last report but one) has finally made itself felt on the Sampling Crate; John Harrison is now trying Waveform Mode again, and seems to be

getting more sensible results, although we haven't got onto analog inputs yet, let alone real signals from a specimen.

Andrew spent this week wrestling with the critical timings on the revised Delay board — he has now modified the board to cope with the extraordinary propagation delays induced by the nasty clock input on the 10G060 counter, but hasn't been able to test it yet. He is on holiday again next week, and the following Monday is a bank holiday.

The revised Waveform Processor - Digital is now at Avantel, but they don't like the assembly drawings (the resistor references on the track side are mirror imaged) so we have got GS designs to plot the assembly drawings out again, this time on film (so we can take dye—line prints) and with the resistor references displayed conventionally.

In the meantime, Avantel will get on with loading the 200psec Blanking boards; they are perfectly happy with our assembly drawings - as they should be. Compared with the Waveform Processor - Digital the 200psec Board is very sparsely populated.

Paul Austin is somewhat less happy about the Burst Mode transfers than he was last week; the transfers seem to run reliably now, but when he and Peter tried transferring grey-scale images they found that they were getting drop-outs; the data is being corrupted somewhere – probably in the TaxiChip links, where the receivers on the Waveform Interface throw up violations from time to time, although the receivers on the Waveform Processor-Digital do not.

In the meantime Paul has solved the problem of the "111" VME bus error with external memory. The Waveform Interface was generating an out-of-spec DTACK signal whenever it was accessed from the VME bus, and these clashed with VME-bus accesses to external memory. Paul got the DTACK into spec by reprogramming the appropriate PAL, and that killed the bus error.

The Sony Magnascales are now on the stage, and Peter is reading them back happily, and can drive the stage to get back to within 2 micron of a specified Magnascale reading.

This doesn't get a specimen back under the column with the same precision - back and forth movements seem to have roughly 40 micron error, and side to side movements roughly 5

micron. The errors look to be consistent, and if predictable might be compensated in software …

This week I almost finished my spec part B for the Blanking Driver board; I have only got the Environmental/Mechanical section left to do.

to: Richard Adams, Bob Ward, Peter Shepherd, Chi Ping Luk, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor,

Chris Warner

from: A.W.Sloman

subject: Progress to 24th August I990

The circuit diagrams for the Waveform Processor - Analog Mark 2 have been up-dated to match the artwork, plotted out on film, and the Meth 3 files archived. Most of the plugs on the circuit diagram are labelled PLAI, PLA2, etc where they are labelled PLI, PL2 etc on the artwork — I was going to correct this by editing the text files, which is quick and fairly easy, but I forgot. I don't think I am going to bother to un-archive the file to make the change.

I've spent almost all of the rest of this week on the revised Trigger board, mostly working on the "short"sampling pulse generator. I finished writing up my conclusions this morning, and they are now sitting on Bob Ward's desk.

While getting there I had to replace IC53 again – another input had gone leaky. Since this was the other input that Andrew Dean had thought to be at risk from an unrestrained op amp output, I put clamping zeners to ground on both inputs - the clamping levels are marginal, but we can do better on the Mark 3 Trigger board.

I've changed a few resistors so that the short pulse widths now run from 48nsec to 1.4nsec in an overlapping series of sub-ranges, and given Peter Milne a list of pulse widths to put in the software.

I haven't been able to do anything about the jitter, but I think I know where it comes from and how to reduce it in a new layout.

Today, at Peter Milne's request, I measured the Encode Delay range on both Trigger Board Mark l from the Sampling Crate, and the Trigger Board Mark 2 I've been working on.

The results were disturbing, probably because I didn't think to set up for a single encode edge. I'll have to repeat the observations, making sure that I program everything relevant before I measure anything. I imagine the delays I measured were okay, but there were some other effects that worried me quite a lot until I'd talked to Bob Ward.

After that it is noise-hunting time in the High Impedance Trigger and External Clock inputs.

Bob Ward seems to have put in quite a lot of time on the Trigger board this week; he has got the Brooktree delay generator onto his circuit diagram, and found a couple of drop-offs in my write-up on the "long" sampling pulse generator.

Andrew Dean's great leap forward has been translated into a moderate leap forward on the Sampling Crate after only three weeks - Closed Loop Waveform has been seen to work by

reliable witnesses. Paul Austin and John Harrison worked out a reliable set of off-sets on Monday, and Closed Loop has been working off and on since then - progressively more

"on" than "off" as the week went on.

The next move seems to be to sort out the Encode Delay (but see above) and the Convert Delay which haven't been explicitly set up so far.

Mike Rolfe hasn't got anything back from Avantel yet, but I've given him two Blanking Driver Mark 5 PCBs, and he is planning on getting both of them loaded — we haven't worked

out quite when yet, but it will probably take a couple of weeks.

Paul Austin is now on holiday until the end of next week - we rang him at home on his first day off, and got good advice, but he is now un-contactable, like Paul Buggs.

Stage positioning is working a bit better now; since Bob Taylor got the bearings tightened up. It seems that we can tighten them up even more — until the motors stall — and it is to be hoped that we get into specification before we run out of torque.

I haven't done anything on my Blanking Drive spec part B this week, and since the assembly drawing for the revised Waveform Processor - Digital haven't got here from GS Designs yet I've got an excuse for not checking layout against parts list.

to: Richard Adams, Martin Wiseman, Chris Warner, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor

from: A.W.Sloman

subject: Progress to 2nd November 1990

Since my last progress report on the 24th August, I've spent eight weeks at home, recovering from a slipped disk; I was able to work half-time last week, and I am working pretty much normal hours this week, which is not to say that I am fully recovered.

My left leg is still weak (though getting slowly stronger), and my left shin is still numb, and these symptoms have persisted long enough for my doctor to refer me to a specialist for a thorough investigation of the state of my back.

While I was at home I wrote a memo on sample spacing for Peter Milne, and another for John Harrison on adjusting "m" and "n" values in Closed Loop signal acquisition for both Waveform and Burst mode operation.

Last week I got surprisingly little work done; the half days I was spending at work got used up in discussing the redundancies and the effects of the reorganisation: the Electronics Component Standards committee is no less necessary under the new structure, but it will be more difficult to get the engineers to spend the time on preparing lists of standard components.

This week I have been concentrating on the 800MHz oscillator on the Trigger Board, working on the second example of the Mark 2 Trigger Board, which still carries the low-noise, low-output D-800 VCO, rather than the C-700 VCO which Bob and Andy bodged onto the first board.

I have managed to get a decent voltage swing on the 800MHz signal out of the transistor amplifier on the second board, by reducing the collector load resistors from 75R to 51R, increasing the tail current from 20mA to 25mA and buffering the clock input to IC70 (pin 39) with the previously unused half of IC38 (a 10G012C-3 buffer). I destroyed one 10G012C~3 buffer in the process.

Once I corrected the dry joint on the 50MHZ crystal oscillator (IC27) the D-800 VCO reliably locked to the crystal oscillator, but the 800MHz clocked showed about l00psec of short-term jitter - rather less than Andy and Bob found on the other Trigger board with the C-700 VCO, which has gain of 40MHz/V compared with the 6MHz/V of the D-800.

This level of jitter is negligible when compared with a 400psec minimum Unblank Pulse, but it is very high for a 1.25nsec period clock. So far all my attempts to reduce the jitter have made it worse, but I think I am getting a better idea of what is going on.

Paul Austin has cheered me up considerably by getting the Averager working on the Waveform Processor - Digital; TDS had used the wrong output from the adder, and Surtech had left three leads open circuit, which is about what we have come to expect.

Paul is now starting on testing the Recirculate Latch, which is the last of the terra incognito on the Waveform Processor - Digital. We need it for all Unblank Pulse widths above 6nsec, so I hope we can get it to work.

Andy has knitted a new 800MHz clock distribution system onto his Delay board, and expects to resume testing the board any time now.

Martin Wiseman has a partially loaded "Waveform Processor - Analog" Mark 2 from Avantel - apparently they loaded only the surface mount components, and a pair of unloaded daughter boards for the column. So far he doesn't seem to have raided my stock of components to get either board finished, but I'm sure that he will.

I've finished off the Blanking Driver spec part B and transferred it into the CMS library.

Bob Ward has given me the Trigger Board spec part B, and I've deposited it in the CMS library, and reserved it back to my files for up-dating.

to: Richard Adams, Martin Wiseman, Chris Warner, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor

from: A.W.Sloman

subject: Progress to 9th November 1990

Dealing with the important stuff first, my back and left leg are perceptibly better than they were last week, but they remain a nuisance; my back was scanned at Addenbrooks yesterday morning and the specialist should have received the pictures by now, so he should now be able to make predictions.

Back at the Trigger board, I've spent another week wrestling with the 800MHz oscillator. Getting adequate voltage swings does not seem to be a problem any longer, but it is now obvious that the D-800 VCO doesn't give a clean sine wave into anything like a complex load; the transistor amplifier presented an intolerable load, and a couple of inches of 50 VMTX sub-minature coaxial cable messed up the VCO output almost as much.

I'm going to try to isolate the VCO output from its load with a grounded-base stage. It ought to work …

Paul Austin is still working on the Recirculate latch; he found a couple of serious bugs early on, but there is at least one more left to find. In the process he and Andy and Pete Milne found out what was intermittently aborting Burst Mode image acquisition, and solved the problem. Serendipity strikes again!

Andy has got his Mark 2 Delay board working; it now runs through sampling lists provided that the trigger rate is faster than 50kHz. The tendency to stop for lower trigger rates is a bug, and_ Andy suspects that it represents marginal timing in one of the ECL PALs. Yohannes's ears are probably burning down at PA Technology.

Martin Wiseman has spent the week familiarising himself with the Waveform Processor - Analog, and loading a daughter board for the column.

Peter Shepherd has called a meeting of the Electronic Components Standards Committee for Monday week. We have been round the Product Directors, and all seem agreed that component standards are a good thing, and that we should aim to have draft lists of components together before the end of the calendar year.

Next week Paul is going to try to get onto the Waveform Processor - Digital Mark 2 now that Steve has finished loading it; if the new board isn't too buggy he may try to get its Recirculate Latch going, rather than going back to Mark l.

Andrew Dean seems to have nailed down the source of our erratic triggering — it turns out that the INTRDIS (Internal Trigger Disable) signals from the both the Delay boards are tracked from the bottom of the Trigger Board to the top to be NOR'ed at ICl8, and the output signal is then tracked most of the way back down the board to clear ICl9.

What starts off as l0nsec wide ECL pulse with sub-nanosecond rise and fall times gets degraded by the rather casual tracking to something rather triangular at ICl8; since IC18 is quite close to the 800MHz oscillator the leading and trailing edges of the output pulse both incorporate a cycle or so of the 800MHz clock.

Andy improved the situation a lot by by-passing the tracking, and routing the signals across the board on sub-minature coax. He effected a complete cure by inverting INTRDIS in the control PAL on his single Delay board, and using this inverted signal to clear ICl9 directly, which is fine for the moment, but stops us using both Delay boards.

The long term fix seems to be to add an extra NOR gate to the bottom of the Trigger board, close to ICl9 and the INTRDIS inputs, and a long way from the noisy bits of the board, so that we can- NOR two reasonably clean INTRDIS pulses and generate a clean output for ICl9.

Martin Wiseman is working his way through the second version of the Waveform Processor - Analog; he has tested the various Filter Grid and Suppressor Grid drives and found them to work much as expected, and is now looking at the input side of the board.

to: Richard Adams, Martin Wiseman, Chris Warner, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor

from: A.W.Sloman

Subject: Progress to 16th November 1990

My back specialist seems to have a rather slow processor - he should have got the MR scans of my back last Friday (the 9th) and it seems that I will not be told his conclusions until next Friday (the 23rd).

On the Trigger board, the 800MHz oscillator is working again but showing about 100psec of jitter. Isolating the VCO from its load with a BFT93 transistor in cascode did not work, but replacing the BFT93 with a BFT92 got the performance back to its high point of a fortnight ago.

Most of the trouble I was having could be explained if the BFT93 were marginally unstable in the configurations in which I was using it. The Philips data for the BFT92 and the BFT93 is rather thin, but the data for the very similar BFQ5l and BFQ23 suggests that the BFT93 would be slightly less stable than the BFT92 under same conditions.

We are buying a relatively cheap microwave circuit analysis package (to run on Chris Warner's PC) in the hope that we can use it to work out how to maximise the gain of the cascode stage at 800MHz and minimise the gain at other frequencies - I assume that our jitter will be reduced if we reduce the gain of the system away from 800MHz.

I've written up the other changes to the 800MHz oscillator for GS Designs, up-dated the circuit diagram on Metheus, and rewritten the relevant part of the Trigger Board Spec part B for version 2 to bring it up to version 3.

I've also rewritten large chunks of the next section of the Spec B, covering the Unblank Pulse generators, to cover the up-grades I sorted out in August.

Paul Austin and Peter Milne have had a tedious week on the Waveform Processor; Peter now has a collection of modules which will drive the hardware reliably until you link them into a continuous routine, when it sometimes drives the hardware reliably. The Recirculate Latch still isn't working - Paul didn't get much time on it this week, but it looks as if a latch that tidies up the Accumulation process after each sample is sitting in the wrong state during processing — a fault in the original design detail.

Martin Wiseman has finished testing the Waveform Processor - Analog Mark 2. The output from the transmission line filter droops a bit, and he is going to try tapering the sampling resistors even more sharply, which ought to help.

The "floating" video outputs seem to work okay; the edge speeds coming out of the balun transformers are a good deal slower than those going in, but 15MHz seems to get through


Martin has proposed a plausible scheme for speeding up the High Voltage Filter Grid output; if we buffer the 16-bit DAC with a really fast low voltage amplifier we might be able to generate a +/-10V or +/-3V output with the l50nsec settling time claimed for the DAC.

If this signal were then amplified to +/-30V by a TP l464 operating from a low impedance source we might get close to the 110nsec settling claimed for that amplifier, for a combined settling time of about 200nsec.

Chris Warner has evaluated the Pilot material as a scintillator in our column; as Don Ranasinghe claimed, it gives much less afterglow than the NEl04 material we have been using, although it doesn't eliminate the problem.

There was a meeting about Beam Blanking on Tuesday – we agreed that the present system isn't good enough, and Chris Warner has been stuck with the problem of working out what sort of blanking plate length and spacing we could live with.

Graham appears to be sufficiently terrified of the DVCS 1500 rotating blanking plates to allow us to design for a blanking system which only cover the beam voltage range 700V to 2kV, and sufficiently mesmerised by the prospect of a really short unblank pulse to allow us to use "flash-over" unblanking to get a 100 to 150psec pulse tacked on the bottom of the existing 0.4/0.8/l.6nsec range.

I've been somewhat preoccupied this week with the preparations for my trip to Japan; by waiting for the travel agents to send me the application form for a visa for Japan, I ended up holding off applying for the visa until the last possible day (without the application form), which turned out to be yesterday - ordinarily I could have applied today, but it is a public holiday in Japan so the embassy is shut…

to: Richard Adams, Martin Wiseman, Chris Warner, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor

from: A.W.Sloman

subject: Progress to 23rd November 1990

I haven’t done anything about the 800MHz oscillator on the Trigger board this week; the circuit analysis program hasn't arrived yet. Paul Detheridge says that the program was actually ordered last week, and has promised to chase Number One Systems this afternoon.

I've done a bit more work on the Trigger Board version 3 circuit diagrams, but there are a few more minor corrections in the pipeline. I've also done some of the cut and link mods required to bring the second version 2 Trigger Board to the same state as the first, but I haven't actually powered the board up this week.

The Waveform Processor - Digital Mark 2 gave us a frustrating couple of days; Paul Austin and Steve Fisher and I have taken most of the week to get the 7.5MHz phase-1ocked loop working. It took a couple of days before Steve noticed that the board layout had put the varactor diode the wrong way round, after which the circuit oscillated at exactly the same frequency as the TaxiChip receiver clock it was supposed to lock to.

Initially, it didn't lock to the TaxiChip receiver clock, and we took some time to find out why - eventually Steve wanted to turn off the RAM Store, but when he "turned it off" he realised that it hadn't been turned on, while I was noticing that the phase-locked loop had suddenly locked in. Apparently the TaxiChip receivers generate a very jittery clock when they haven't got a transmitter output to lock onto.

Now that Andrew Dean has got Trigger Boards and Delay Boards triggering reliably - the second implementation produced a race and it took Andy a day or so to get it working right - he and Peter Milne have been looking at Waveform Acquisition again. Peter has found a bug in the program that generates the Delay List, which he has fixed, but not yet tested, and there is something that looks like a hardware bug which messes up the Waveforms for inter-sample intervals between 100 and 110nsec, but at least it does it reliably.

I suspect that the counter that sets the number of encodes per sample is getting re-loaded at the wrong time, but I haven't got time to look.

The Processing Pulse counter and the Processing Loop hardware haven't been tested, nor has the trigger lock-out/reset mechanism.

The Trigger Board version 3 circuit diagrams on Meth 2 are reasonably up to date; I haven't put in any of the decoupling around the High Impedance Trigger and External Clock inputs yet. The version 3 Part B specification is in a similar state.

Paul Austin and Steve Fisher are making progress on the Waveform Processor - Digital Mark 2. On Monday the TaxiChip link was producing lots of violations, but setting the word-length link right fixed that; then they found a mod had had been missed off the new layout’ around the scratch-pad RAM, had had to cut-and-link it in. Paul has persuaded the board to go through Zero and Reset cycles, but the useful cycles like Accumulate, Subtract, Update l and Update 2, haven't worked yet.

Andrew Dean has made progress of a sort on the Delay board; he has found that the timing on reading the delay list out of RAM has gotten thoroughly mucked up, which explains why the board isn't working right. Of course we don't know how many fundamental design flaws are concealed beneath this trivial error in execution, but Andy is confident that he can sort out the timing.

The state of my back is now officially determined to be bad; my neurosurgeon showed me the ruptured disk in the MR scans of my back, and tells me that the extruded bit of disk won't retract or get re-absorbed, so he has got to get in there with the knife, and pare it off. The NHS queue for the operation is six to nine months, and it will take me off work for another seven weeks (mostly six weeks bed-rest at home) when it happens.

In the meantime, I'm okay to fly off for Japan and Australia, although the neurosurgeon did recommend carrying plenty of pain-killers for the flights. So I fly out of Heathrow for Japan next week, and I'll be back early on the 29th December.

This means that this is my last opportunity to wish you Merry Christmas and a Happy New Year - it seems a bit early somehow, for anybody not in the retail trade.

(Note added 1/1/2013. The neurosurgeon was wrong. When – six months later, I was offered the operation, my back had improved enough that I didn't think I needed it, and the neurosurgeon conceded that I was probably right, though he did suggest – wrongly – that I'd need it eventually. At the interview referred to above, he'd offered to do the operation privately and immediately for a flat fee of £3,000, which I'd declined, and I'm inclined to think that his desire to do the operation was clouding his judgment.)

to: Richard Adams, Martin Wiseman, Chris Warner, Peter Milne, Simon Dawes, Trevor Sexton, Paul Austin, John Harrison, Roland Meins, Andrew Dean, Bob Taylor

from: A.W.Sloman

subject: Progress to 30th November 1990

I haven't done anything about the 800MHz oscillator on the Trigger Board this week either; the circuit analysis program still hasn't arrived. The order number is P661965, if anyone is interested in playing with the program when it does arrive. Paul Detheridge’s idea of chasing Number One Systems seems to have been to agree next Monday as a revised delivery date.

I've done some work on the High Impedance Trigger Input section of the second version 2 Trigger Board - the 150mV noise on this input seems to be coupling in from the rails by a variety of routes, and we will probably have to decouple almost every connection between the analogue part and the +15V and -l5V rails with separate 100R resistors and tantalum capacitors.

I've checked the Unblank Pulse widths generated by the second version 2 Trigger board, after putting in the cut and link mods required to kill the jitter; they came out within l0% of the pulse widths I'd measured on the other board. Peter had to modify his "ubpwcal" routine it initially missed three of the short unblank pulse ranges (4nsec to 11nsec, 7nsec to 21nsec, and l3.5nsec to 42nsec).

The High Speed Trigger and External Clock inputs seem to be working; I checked them both with a 10MHz 100mV square wave at offsets of 0V, +4V and -4V, and got regular outputs into the counters for all six cases, after I'd programmed the right threshold values. Of course, I had to turn over the high power 50R termination resistors on both inputs they had been loaded with their metalised backs across the pads, leaving the 50R side isolated in mid-air.

The Encode, Convert, Memory, Write, Latch and Squelch outputs are all working, although I had to replace IC88 before the last four would go, but something odd is happening with Multiple Encodes per Sample the first Encode is 20nsec wide, rather than 10nsec, the second Encode appears 30nsec after the first, not 20nsec, the last Encode in the sequence is again 20nsec wide, and it seems that the circuit it trying to produce n+0.5 Encode pulses per sequence. The Memory, Write and Squelch pulses seem to alternate in position by 20nsec, as does the Latch sequence.

(Note added 28-07-2017 : this probably went into the system before the end of the week, and just records what I did get done before I flew off to Japan – it doesn't record what everybody else had been doing which means that I hadn't taken the time to walk around and talk to everybody before I wrote it.)